VetoPerf analysis over V1:Hrec_hoft_16384Hz


Summary

VetoPerf version:3.2.0: documentation gitlab repository
VetoPerf run by:unknown
VetoPerf processing time:0 h, 12 min, 31 s
Processing Date:Thu Feb 13 10:02:29 2025 (UTC)
Requested start:1420288240 → Tue Jan 7 12:30:22 2025 (UTC)
Requested stop:1421478029 → Tue Jan 21 07:00:11 2025 (UTC)
Requested livetime:821616 sec → 9.509 days
Requested segments:vp.insegments.txt
Summary text file:vp.summary.txt

Triggers (V1:Hrec_hoft_16384Hz - OMICRON)

Number of raw triggers:61913943
Number of raw clusters:133638
Number of active clusters:122170 (SNR > 5.000) 3933 (SNR > 8.000) 2303 (SNR > 10.000) 1250 (SNR > 20.000)

Vetoes

Number of vetoes:100
Dead time: Integrated time when the veto is active. We note d the fraction of the total livetime (821616 s) when the veto is active.
Efficiency (ε):This is the fraction of V1:Hrec_hoft_16384Hz triggers which are vetoed.
ε/d:This factor is larger than 1 when the veto rejects more triggers than a random veto.
V1:Hrec_hoft_16384Hz: 122170 clusters
V0 → V1:Sa_PR_F0_Z_CORR_500Hz_0, vetoed clusters: 158 (0.129 %)
V1 → V1:Sa_PR_F0_COIL_H3_500Hz_0, vetoed clusters: 150 (0.123 %)
V2 → V1:Sa_PR_F0_COIL_H2_500Hz_0, vetoed clusters: 146 (0.120 %)
V3 → V1:Sa_PR_F0_COIL_H1_500Hz_0, vetoed clusters: 52 (0.043 %)
V4 → V1:Sa_PR_F0_Z_GIPC_500Hz_0, vetoed clusters: 51 (0.042 %)
V5 → V1:Sa_PR_F0_ACC_H1_500Hz_0, vetoed clusters: 51 (0.042 %)
V6 → V1:Sa_PR_F0_ACC_H3_500Hz_0, vetoed clusters: 47 (0.038 %)
V7 → V1:Sa_PR_F0_ACC_V1_FB_500Hz_0, vetoed clusters: 46 (0.038 %)
V8 → V1:Sa_PR_Acc1ABS_500Hz_0, vetoed clusters: 45 (0.037 %)
V9 → V1:Sa_PR_F0_ACC_V2_FB_500Hz_0, vetoed clusters: 44 (0.036 %)

V0: V1:Sa_PR_F0_Z_CORR_500Hz_0 (ε = 0.129%, ε/d = 376.645) [click here to expand/hide] [link to here]


V1: V1:Sa_PR_F0_COIL_H3_500Hz_0 (ε = 0.123%, ε/d = 347.125) [click here to expand/hide] [link to here]


V2: V1:Sa_PR_F0_COIL_H2_500Hz_0 (ε = 0.120%, ε/d = 434.296) [click here to expand/hide] [link to here]


V3: V1:Sa_PR_F0_COIL_H1_500Hz_0 (ε = 0.043%, ε/d = 448.517) [click here to expand/hide] [link to here]


V4: V1:Sa_PR_F0_Z_GIPC_500Hz_0 (ε = 0.042%, ε/d = 419.809) [click here to expand/hide] [link to here]


V5: V1:Sa_PR_F0_ACC_H1_500Hz_0 (ε = 0.042%, ε/d = 387.014) [click here to expand/hide] [link to here]


V6: V1:Sa_PR_F0_ACC_H3_500Hz_0 (ε = 0.038%, ε/d = 364.107) [click here to expand/hide] [link to here]


V7: V1:Sa_PR_F0_ACC_V1_FB_500Hz_0 (ε = 0.038%, ε/d = 370.955) [click here to expand/hide] [link to here]


V8: V1:Sa_PR_Acc1ABS_500Hz_0 (ε = 0.037%, ε/d = 33.876) [click here to expand/hide] [link to here]


V9: V1:Sa_PR_F0_ACC_V2_FB_500Hz_0 (ε = 0.036%, ε/d = 417.487) [click here to expand/hide] [link to here]


V10: V1:Sa_PR_F0_ACC_V2_500Hz_0 (ε = 0.035%, ε/d = 354.321) [click here to expand/hide] [link to here]


V11: V1:Sa_PR_F0_ACC_H3_FB_500Hz_0 (ε = 0.035%, ε/d = 585.664) [click here to expand/hide] [link to here]


V12: V1:Sa_PR_F0_ACC_TY_500Hz_0 (ε = 0.033%, ε/d = 264.798) [click here to expand/hide] [link to here]


V13: V1:Sa_PR_F0_TY_CORR_500Hz_0 (ε = 0.033%, ε/d = 222.926) [click here to expand/hide] [link to here]


V14: V1:Sa_PR_F0_ACC_Z_500Hz_0 (ε = 0.032%, ε/d = 424.500) [click here to expand/hide] [link to here]


V15: V1:Sa_PR_F0_ACC_V1_500Hz_0 (ε = 0.031%, ε/d = 415.327) [click here to expand/hide] [link to here]


V16: V1:Sa_PR_F0_ACC_H1_FB_500Hz_0 (ε = 0.030%, ε/d = 619.059) [click here to expand/hide] [link to here]


V17: V1:Sa_PR_F0_ACC_X_500Hz_0 (ε = 0.025%, ε/d = 340.099) [click here to expand/hide] [link to here]


V18: V1:Sa_PR_F0_ACC_H2_FB_500Hz_0 (ε = 0.025%, ε/d = 243.734) [click here to expand/hide] [link to here]


V19: V1:Sa_PR_F0_ACC_H2_500Hz_0 (ε = 0.025%, ε/d = 279.646) [click here to expand/hide] [link to here]


V20: V1:Sa_PR_F0_X_CORR_500Hz_0 (ε = 0.024%, ε/d = 336.054) [click here to expand/hide] [link to here]


V21: V1:Sa_PR_F0_TY_500Hz_0 (ε = 0.006%, ε/d = 109.179) [click here to expand/hide] [link to here]


V22: V1:Sa_PR_F0_LVDT_H2_500Hz_0 (ε = 0.003%, ε/d = 131.100) [click here to expand/hide] [link to here]


V23: V1:Sa_NI_F0_Z_GIPC_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V24: V1:Sa_NI_F1_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V25: V1:Sa_NI_F2_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V26: V1:Sa_NI_F3_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V27: V1:Sa_NI_F4_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V28: V1:Sa_NI_F7_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V29: V1:Sa_NI_F7_X_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V30: V1:Sa_NI_F7_X_FEED_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V31: V1:Sa_NI_F7_Z_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V32: V1:Sa_NI_F7_Z_FEED_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V33: V1:Sa_NI_GR_TY_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V34: V1:Sa_NI_MIR_LVDT_Y_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V35: V1:Sa_OB_BR_LVDT1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V36: V1:Sa_OB_BR_LVDT2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V37: V1:Sa_OB_BR_LVDT3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V38: V1:Sa_OB_F0_ACC_H1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V39: V1:Sa_OB_F0_ACC_H1_FB_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V40: V1:Sa_OB_F0_ACC_H2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V41: V1:Sa_OB_F0_ACC_H2_FB_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V42: V1:Sa_OB_F0_ACC_H3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V43: V1:Sa_OB_F0_ACC_H3_FB_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V44: V1:Sa_OB_F0_ACC_TY_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V45: V1:Sa_OB_F0_ACC_V1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V46: V1:Sa_OB_F0_ACC_V1_FB_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V47: V1:Sa_OB_F0_ACC_V2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V48: V1:Sa_OB_F0_ACC_V2_FB_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V49: V1:Sa_OB_F0_ACC_X_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V50: V1:Sa_OB_F0_ACC_Z_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V51: V1:Sa_OB_F0_COIL_H1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V52: V1:Sa_OB_F0_COIL_H2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V53: V1:Sa_OB_F0_COIL_H3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V54: V1:Sa_OB_F0_COIL_V1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V55: V1:Sa_OB_F0_COIL_V2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V56: V1:Sa_OB_F0_LVDT_H1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V57: V1:Sa_OB_F0_LVDT_H2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V58: V1:Sa_OB_F0_LVDT_H3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V59: V1:Sa_OB_F0_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V60: V1:Sa_OB_F0_SRyLE_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V61: V1:Sa_OB_F0_TX_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V62: V1:Sa_OB_F0_TY_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V63: V1:Sa_OB_F0_TY_CORR_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V64: V1:Sa_OB_F0_TZ_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V65: V1:Sa_OB_F0_X_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V66: V1:Sa_OB_F0_X_CORR_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V67: V1:Sa_OB_F0_Y_CORR_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V68: V1:Sa_OB_F0_Z_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V69: V1:Sa_OB_F0_Z_CORR_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V70: V1:Sa_OB_F0_Z_GIPC_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V71: V1:Sa_OB_F0_yLE_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V72: V1:Sa_OB_F4_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V73: V1:Sa_OB_F7_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V74: V1:Sa_OB_GR_TY_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V75: V1:Sa_PR_BR_LVDT1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V76: V1:Sa_PR_BR_LVDT2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V77: V1:Sa_PR_BR_LVDT3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V78: V1:Sa_PR_F0_COIL_V1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V79: V1:Sa_PR_F0_COIL_V2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V80: V1:Sa_PR_F0_LVDT_H1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V81: V1:Sa_PR_F0_LVDT_H3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V82: V1:Sa_PR_F0_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V83: V1:Sa_PR_F0_VOUT_COIL1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V84: V1:Sa_PR_F0_VOUT_COIL2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V85: V1:Sa_PR_F0_VOUT_COIL3_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V86: V1:Sa_PR_F0_VOUT_VCOIL1_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V87: V1:Sa_PR_F0_VOUT_VCOIL2_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V88: V1:Sa_PR_F0_X_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V89: V1:Sa_PR_F0_Y_CORR_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V90: V1:Sa_PR_F0_Z_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V91: V1:Sa_PR_F1_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V92: V1:Sa_PR_F2_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V93: V1:Sa_PR_F3_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V94: V1:Sa_PR_F4_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V95: V1:Sa_PR_F7_LVDT_V_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V96: V1:Sa_PR_F7_X_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V97: V1:Sa_PR_F7_X_FEED_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V98: V1:Sa_PR_F7_Z_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V99: V1:Sa_PR_F7_Z_FEED_500Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr