OUTPUT  DIRECTORY  ./report
OUTPUT  VERBOSITY  1

TARGET  OMICRON    V1:Hrec_hoft_16384Hz
TARGET  CLUSTERDT  0.1
TARGET  SNRMIN     7

COINC   TIMEWIN    1.0

VETO    UPMIN      0.4
VETO    UMIN       10
VETO    PRINT      0
VETO    PERF       5  8  10  20
VETO    PERFPRINT  1  0

SOURCE  CLUSTERDT  0.1
SOURCE  OMICRON    V1:Sa_WI_F0_COIL_V1_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_COIL_V2_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_KACC_H1_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_KACC_H2_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_KACC_H3_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_LVDT_H1_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_LVDT_H2_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_LVDT_H3_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_LVDT_V_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_NOISE_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_TX_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_TY_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_TY_CORR_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_TZ_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_X_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_X_CORR_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_Y_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_Y_CORR_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_Z_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_Z_CORR_500Hz
SOURCE  OMICRON    V1:Sa_WI_F0_Z_GIPC_500Hz
SOURCE  OMICRON    V1:Sa_WI_F1_LVDT_V_500Hz
SOURCE  OMICRON    V1:Sa_WI_F2_LVDT_V_500Hz
SOURCE  OMICRON    V1:Sa_WI_F3_LVDT_V_500Hz
SOURCE  OMICRON    V1:Sa_WI_F4_LVDT_V_500Hz
SOURCE  OMICRON    V1:Sa_WI_F7_LVDT_V_500Hz
SOURCE  OMICRON    V1:Sa_WI_F7_X_500Hz
SOURCE  OMICRON    V1:Sa_WI_F7_X_FEED_500Hz
SOURCE  OMICRON    V1:Sa_WI_F7_Z_500Hz
SOURCE  OMICRON    V1:Sa_WI_F7_Z_FEED_500Hz
SOURCE  OMICRON    V1:Sa_WI_GR_TY_500Hz
SOURCE  OMICRON    V1:Sa_WI_PRODLP_500Hz
SOURCE  OMICRON    V1:Sa_WI_PRODQLP_500Hz
SOURCE  OMICRON    V1:Sa_WI_SIG1_500Hz
SOURCE  OMICRON    V1:Sa_WI_SIG2_500Hz
SOURCE  OMICRON    V1:Sc_BS_CMRF
SOURCE  OMICRON    V1:Sc_BS_F7_LVDT_H1
SOURCE  OMICRON    V1:Sc_BS_F7_LVDT_H2
SOURCE  OMICRON    V1:Sc_BS_F7_LVDT_H3
SOURCE  OMICRON    V1:Sc_BS_F7_LVDT_V1
SOURCE  OMICRON    V1:Sc_BS_F7_LVDT_V2
SOURCE  OMICRON    V1:Sc_BS_F7_LVDT_V3
SOURCE  OMICRON    V1:Sc_BS_F7_TX
SOURCE  OMICRON    V1:Sc_BS_F7_TX_CORR
SOURCE  OMICRON    V1:Sc_BS_F7_TY
SOURCE  OMICRON    V1:Sc_BS_F7_TY_CORR
SOURCE  OMICRON    V1:Sc_BS_F7_TZ
SOURCE  OMICRON    V1:Sc_BS_F7_TZ_CORR
SOURCE  OMICRON    V1:Sc_BS_F7_X
SOURCE  OMICRON    V1:Sc_BS_F7_Y
SOURCE  OMICRON    V1:Sc_BS_F7_Z
SOURCE  OMICRON    V1:Sc_BS_LOCK_FLAG
SOURCE  OMICRON    V1:Sc_BS_MAR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDM_PWR
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDM_X1
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDM_X2
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDM_Y1
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDM_Y2
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDT_PWR
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDT_X1
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDT_X2
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDT_Y1
SOURCE  OMICRON    V1:Sc_BS_MAR_PSDT_Y2
SOURCE  OMICRON    V1:Sc_BS_MAR_TX
SOURCE  OMICRON    V1:Sc_BS_MAR_TX_CORR
SOURCE  OMICRON    V1:Sc_BS_MAR_TY
SOURCE  OMICRON    V1:Sc_BS_MAR_TY_CORR
SOURCE  OMICRON    V1:Sc_BS_MAR_TY_T
SOURCE  OMICRON    V1:Sc_BS_MAR_TZ
SOURCE  OMICRON    V1:Sc_BS_MAR_TZ_CORR
SOURCE  OMICRON    V1:Sc_BS_MAR_Z_CORR
SOURCE  OMICRON    V1:Sc_BS_MIR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_BS_MIR_LSC_CORR
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_PWR
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_X1
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_X2
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_Y1
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_Y2
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDI_PWR
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDI_X2
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDI_Y2
SOURCE  OMICRON    V1:Sc_BS_MIR_TX
SOURCE  OMICRON    V1:Sc_BS_MIR_TX_AA
SOURCE  OMICRON    V1:Sc_BS_MIR_TY
SOURCE  OMICRON    V1:Sc_BS_MIR_TY_AA
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_DL
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_DR
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_UL
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_UR
SOURCE  OMICRON    V1:Sc_BS_MIR_Z
SOURCE  OMICRON    V1:Sc_BS_MIR_Z_CORR
SOURCE  OMICRON    V1:Sc_BS_MIR_Z_CORR_LN
SOURCE  OMICRON    V1:Sc_BS_fModErr
SOURCE  OMICRON    V1:Sc_BS_noise
SOURCE  OMICRON    V1:Sc_IB_AAsw
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_PWR
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_X1
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_X2
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_Y1
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_Y2