VetoPerf analysis over V1:Hrec_hoft_16384Hz


Summary

VetoPerf version:3.2.0: documentation gitlab repository
VetoPerf run by:unknown
VetoPerf processing time:1 h, 34 min, 18 s
Processing Date:Fri Jun 20 18:46:33 2025 (UTC)
Requested start:1433251331 → Fri Jun 6 13:21:53 2025 (UTC)
Requested stop:1433662376 → Wed Jun 11 07:32:38 2025 (UTC)
Requested livetime:256511 sec → 2.969 days
Requested segments:vp.insegments.txt
Summary text file:vp.summary.txt

Triggers (V1:Hrec_hoft_16384Hz - OMICRON)

Number of raw triggers:48226537
Number of raw clusters:34915
Number of active clusters:34915 (SNR > 5.000) 6124 (SNR > 8.000) 5110 (SNR > 10.000) 3304 (SNR > 20.000)

Vetoes

Number of vetoes:100
Dead time: Integrated time when the veto is active. We note d the fraction of the total livetime (256511 s) when the veto is active.
Efficiency (ε):This is the fraction of V1:Hrec_hoft_16384Hz triggers which are vetoed.
ε/d:This factor is larger than 1 when the veto rejects more triggers than a random veto.
V1:Hrec_hoft_16384Hz: 34915 clusters

V0: V1:ASC_PR_X_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V1: V1:ASC_PR_X_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V2: V1:ASC_PR_X_ENBL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V3: V1:ASC_PR_X_IN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V4: V1:ASC_PR_X_INPUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V5: V1:ASC_PR_X_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V6: V1:ASC_PR_X_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V7: V1:ASC_PR_X_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V8: V1:ASC_PR_Y_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V9: V1:ASC_PR_Y_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V10: V1:ASC_PR_Y_ENBL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V11: V1:ASC_PR_Y_IN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V12: V1:ASC_PR_Y_INPUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V13: V1:ASC_PR_Y_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V14: V1:ASC_PR_Y_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V15: V1:ASC_PR_Y_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V16: V1:ASC_SR_DOF_TX_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V17: V1:ASC_SR_DOF_TY_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V18: V1:ASC_SR_TX_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V19: V1:ASC_SR_TX_B1p_DCP_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V20: V1:ASC_SR_TX_ENBL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V21: V1:ASC_SR_TX_ERR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V22: V1:ASC_SR_TX_IN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V23: V1:ASC_SR_TX_INPUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V24: V1:ASC_SR_TX_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V25: V1:ASC_SR_TX_OUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V26: V1:ASC_SR_TX_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V27: V1:ASC_SR_TY_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V28: V1:ASC_SR_TY_ENBL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V29: V1:ASC_SR_TY_ERR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V30: V1:ASC_SR_TY_IN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V31: V1:ASC_SR_TY_INPUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V32: V1:ASC_SR_TY_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V33: V1:ASC_SR_TY_OUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V34: V1:ASC_SR_TY_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V35: V1:ASC_WE_TX_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V36: V1:ASC_WE_TX_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V37: V1:ASC_WE_TX_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V38: V1:ASC_WE_TY_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V39: V1:ASC_WE_TY_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V40: V1:ASC_WE_TY_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V41: V1:ASC_WI_TX_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V42: V1:ASC_WI_TX_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V43: V1:ASC_WI_TX_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V44: V1:ASC_WI_TY_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V45: V1:ASC_WI_TY_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V46: V1:ASC_WI_TY_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V47: V1:ASC_pre_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V48: V1:ASC_pre_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V49: V1:BsX_AAsw_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V50: V1:BsX_Driftsw_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V51: V1:BsX_GLB00_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V52: V1:BsX_GLB01_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V53: V1:BsX_GLB02_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V54: V1:BsX_GLB03_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V55: V1:BsX_GLB04_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V56: V1:BsX_GLB05_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V57: V1:BsX_GLB06_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V58: V1:BsX_ML_PZT_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V59: V1:BsX_ML_TH_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V60: V1:BsX_Mon_PZ1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V61: V1:BsX_PWRTrig_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V62: V1:BsX_PZT_DH_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V63: V1:BsX_PZT_DHC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V64: V1:BsX_PZT_DV_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V65: V1:BsX_PZT_DVC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V66: V1:BsX_PZT_UH_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V67: V1:BsX_PZT_UHC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V68: V1:BsX_PZT_UV_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V69: V1:BsX_PZT_UVC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V70: V1:BsX_QF_DC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V71: V1:BsX_QF_h_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V72: V1:BsX_QF_v_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V73: V1:BsX_QN_DC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V74: V1:BsX_QN_h_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V75: V1:BsX_QN_v_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V76: V1:BsX_TX_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V77: V1:BsX_TX_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V78: V1:BsX_TY_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V79: V1:BsX_TY_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V80: V1:BsX_X_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V81: V1:BsX_X_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V82: V1:BsX_Y_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V83: V1:BsX_Y_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V84: V1:BsX_checkPSD_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V85: V1:CAL_BS_MIR_Z_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V86: V1:CAL_NE_MIR_UL_MONI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V87: V1:CAL_NE_MIR_Z_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V88: V1:CAL_NE_MIR_Z_NOISE_NO_HI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V89: V1:CAL_PR_MAR_Z_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V90: V1:CAL_SR_MAR_Z_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V91: V1:CAL_WE_MIR_Z_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V92: V1:CAL_WE_MIR_Z_NOISE_NO_HI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V93: V1:CALnoise_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V94: V1:CALnoise_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V95: V1:DAQ_GPS_S650_mag_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V96: V1:DAQ_GPS_S650_phi_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V97: V1:DAQ_SQZ_Clock_100MHz_raw_mag_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V98: V1:DAQ_SQZ_Clock_100MHz_raw_phi_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V99: V1:DAQ_TDBv1_mag_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr