OUTPUT  DIRECTORY  ./report
OUTPUT  VERBOSITY  1

TARGET  OMICRON    V1:Hrec_hoft_16384Hz
TARGET  CLUSTERDT  0.1
TARGET  SNRMIN     7

COINC   TIMEWIN    1.0

VETO    UPMIN      0.4
VETO    UMIN       10
VETO    PRINT      0
VETO    PERF       5  8  10  20
VETO    PERFPRINT  1  0

SOURCE  CLUSTERDT  0.1
SOURCE  OMICRON    V1:SBE_SQB2_F0_x_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_F0_y_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_F0_z_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_F0_z_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_F0_z_LVDT_low_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_F0_z_SEI_high_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_F1_y_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_GEO_F0H2_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_LVDT_F0H0_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_LVDT_F0H1_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_LVDT_F0H2_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_LVDT_F0V_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_LVDT_F1V_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_SA_F0_diff_LVDT_x_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_SA_F0_diff_LVDT_z_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_Trillium_F0X_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_Trillium_F0Y_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_Trillium_F0Z_raw_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act0_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act1_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act2_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act3_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act_ty_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act_x_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act_y_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_act_z_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_hor_safety_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_loop_act_hor_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_loop_act_ver_500Hz
SOURCE  OMICRON    V1:SBE_SQB2_vert_safety_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_ACT_F0H0_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_ACT_F0H1_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_ACT_F0H2_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_ACT_F0V_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_Trillium_x_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_Trillium_y_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_Trillium_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_ty_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_ty_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_x_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_x_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_y_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_y_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F0_z_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_F1_y_LVDT_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_GEO_GRNS_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_GEO_GRV_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_GEO_GRWE_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_GEO_X_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_LVDT_F0H0_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_LVDT_F0H1_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_LVDT_F0H2_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_LVDT_F0V_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_LVDT_F1V_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_NbSa_F0_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_SA_F0_diff_LVDT_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_TRIL_X_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_TRIL_Y_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_TRIL_Z_raw_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act0_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act1_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act2_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act3_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act_ty_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act_x_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act_y_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_act_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_actty_test_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_actx_test_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_acty_test_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_actz_test_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_diff_bench_MIR_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_diff_speed_bench_MIR_z_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_hor_safety_500Hz
SOURCE  OMICRON    V1:SBE_SWEB_vert_safety_500Hz
SOURCE  OMICRON    V1:SDB1_B1_DARM_TX_offset
SOURCE  OMICRON    V1:SDB1_B1_DARM_TY_offset
SOURCE  OMICRON    V1:SDB1_B1_PD3_DC_norm_B1p
SOURCE  OMICRON    V1:SDB1_B1_PD3_DC_norm_B1p_sw
SOURCE  OMICRON    V1:SDB1_B1_PD3_DC_norm_B1s
SOURCE  OMICRON    V1:SDB1_B1_PD3_f1_i
SOURCE  OMICRON    V1:SDB1_B1_PD3_f1_i_DCn
SOURCE  OMICRON    V1:SDB1_B1_PD3_f1_q
SOURCE  OMICRON    V1:SDB1_B1_f1_DARM_DCn_i
SOURCE  OMICRON    V1:SDB1_B1_f1_DARM_DCn_q
SOURCE  OMICRON    V1:SDB1_B1_f1_i
SOURCE  OMICRON    V1:SDB1_B1_f1_i_DCn
SOURCE  OMICRON    V1:SDB1_B1_f1_q
SOURCE  OMICRON    V1:SDB1_B1s_f1_i
SOURCE  OMICRON    V1:SDB1_B1s_f1_q
SOURCE  OMICRON    V1:SDB1_B1x_DC_DARM_i
SOURCE  OMICRON    V1:SDB1_B1x_DC_DARM_q
SOURCE  OMICRON    V1:SDB1_B1x_f1_DARM_i
SOURCE  OMICRON    V1:SDB1_B1x_f1_DARM_i_DC2n
SOURCE  OMICRON    V1:SDB1_B1x_f1_DARM_i_DCn
SOURCE  OMICRON    V1:SDB1_B1x_f1_DARM_q
SOURCE  OMICRON    V1:SDB1_B1x_f1_i_DC2n_err
SOURCE  OMICRON    V1:SDB1_B1x_f1_i_DCn
SOURCE  OMICRON    V1:SDB1_B1x_f1_i_n