UPV analysis over V1:Hrec_hoft_16384Hz


upv ./segments.txt ./parameters.txt 

Summary

UPV version:3.2.0: documentation gitlab repository
UPV run by:unknown
UPV processing time:0 h, 9 min, 8 s
Processing Date:Thu Feb 13 09:58:09 2025 (UTC)
Requested start:1420288240 → Tue Jan 7 12:30:22 2025 (UTC)
Requested stop:1421478029 → Tue Jan 21 07:00:11 2025 (UTC)
Requested livetime:825629 sec → 9.556 days
Requested segments:upv.insegments.txt
Summary text file:upv.summary.txt
Number of source channels:100 (out of 100)

Parameters

Configuration:upv.parameters.txt
Target SNR selection:SNR > 7.000
Target frequency selection:16.000 Hz < f < 1956.764 Hz
Coincidence time window:δt = 1.000 s
Veto definition:use-percentage > 0.400 (per frequency bin)
number of used source clusters > 10 (per frequency bin)

Target = V1:Hrec_hoft_16384Hz

Note: these plots includes the triggers used in the VetoPerf report: the selection can be different from the one used for UPV.


Veto performance

The veto performance has been measured. See the VetoPerf report.


V0 (207): V1:SIB2_B2_PD2_56MHz_Q_0 [click here to expand/hide] [link to here]


V1 (199): V1:SIB2_B2_PD2_DC_0 [click here to expand/hide] [link to here]


V2 (195): V1:SIB2_B2_PD2_6MHz_Q_0 [click here to expand/hide] [link to here]


V3 (194): V1:SIB2_B2_PD2_6MHz_I_0 [click here to expand/hide] [link to here]


V4 (181): V1:SIB2_B2_QD1_Sum_0 [click here to expand/hide] [link to here]


V5 (180): V1:SIB2_B2_PD3_6MHz_I_0 [click here to expand/hide] [link to here]


V6 (177): V1:SIB2_B2_PD3_DC_0 [click here to expand/hide] [link to here]


V7 (174): V1:SIB2_B2_PD3_Audio_ool_0 [click here to expand/hide] [link to here]


V8 (173): V1:SIB2_B2_PD3_Blended_0 [click here to expand/hide] [link to here]


V9 (173): V1:SIB2_B2_PD3_Audio_0 [click here to expand/hide] [link to here]


V10 (172): V1:SIB2_B2_PD2_Audio_ool_0 [click here to expand/hide] [link to here]


V11 (170): V1:SIB2_B2_PD2_Blended_0 [click here to expand/hide] [link to here]


V12 (169): V1:SIB2_B2_PD2_Audio_0 [click here to expand/hide] [link to here]


V13 (142): V1:SIB2_B2_PD3_56MHz_Q_0 [click here to expand/hide] [link to here]


V14 (117): V1:SIB2_B2_PD2_50MHz_mag_0 [click here to expand/hide] [link to here]


V15 (116): V1:SIB2_B2_PD3_56MHz_I_0 [click here to expand/hide] [link to here]


V16 (109): V1:SIB2_B2_PD2_56MHz_I_0 [click here to expand/hide] [link to here]


V17 (100): V1:SIB2_B2_QD1_6MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V18 (96): V1:SIB2_B2_QD1_V_0 [click here to expand/hide] [link to here]


V19 (87): V1:SIB2_B2_QD1_6MHz_H_Q_0 [click here to expand/hide] [link to here]


V20 (83): V1:SIB2_B2_PD3_12MHz_mag_0 [click here to expand/hide] [link to here]


V21 (72): V1:SIB2_B2_QD1_56MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V22 (64): V1:SIB2_B2_QD1_H_norm_0 [click here to expand/hide] [link to here]


V23 (64): V1:SIB2_B2_QD1_6MHz_H_I_0 [click here to expand/hide] [link to here]


V24 (61): V1:SIB2_B2_QD1_H_0 [click here to expand/hide] [link to here]


V25 (56): V1:SIB2_B2_QD1_56MHz_H_Q_0 [click here to expand/hide] [link to here]


V26 (54): V1:SIB2_B2_QD1_6MHz_SUM_I_0 [click here to expand/hide] [link to here]


V27 (53): V1:SIB2_B2_QD1_V_norm_0 [click here to expand/hide] [link to here]


V28 (53): V1:SIB2_B2_QD1_56MHz_SUM_I_0 [click here to expand/hide] [link to here]


V29 (46): V1:SIB2_B2_QD1_8MHz_SUM_I_0 [click here to expand/hide] [link to here]


V30 (46): V1:SIB2_B2_PD2_8MHz_I_0 [click here to expand/hide] [link to here]


V31 (43): V1:SIB2_B2_PD3_8MHz_I_0 [click here to expand/hide] [link to here]


V32 (40): V1:SIB2_B2_PD2_IBias_0 [click here to expand/hide] [link to here]


V33 (34): V1:SIB2_B2_QD1_56MHz_H_I_0 [click here to expand/hide] [link to here]


V34 (33): V1:SIB2_B2_QD1_56MHz_V_I_0 [click here to expand/hide] [link to here]


V35 (33): V1:SIB2_B2_PD3_8MHz_Q_0 [click here to expand/hide] [link to here]


V36 (32): V1:SIB2_B2_PD2_50MHz_phi_0 [click here to expand/hide] [link to here]


V37 (29): V1:SIB2_B2_PD2_8MHz_Q_0 [click here to expand/hide] [link to here]


V38 (27): V1:SIB2_B2_PD3_6MHz_Q_0 [click here to expand/hide] [link to here]


V39 (27): V1:SIB2_B2_PD3_112MHz_mag_0 [click here to expand/hide] [link to here]


V40 (26): V1:SIB2_B2_QD1_56MHz_V_Q_0 [click here to expand/hide] [link to here]


V41 (26): V1:SIB2_B2_PD3_18MHz_I_0 [click here to expand/hide] [link to here]


V42 (15): V1:SIB2_B2_QD1_6MHz_V_Q_0 [click here to expand/hide] [link to here]


V43 (12): V1:SIB2_B2_PD3_112MHz_phi_0 [click here to expand/hide] [link to here]


V44 (11): V1:SIB2_B2_QD1_6MHz_V_I_0 [click here to expand/hide] [link to here]


V45 (0): V1:SIB2_B2_QD2_2f_centering_0 [click here to expand/hide] [link to here]


V46 (0): V1:SIB2_B2_QD2_18MHz_V_Q_0 [click here to expand/hide] [link to here]


V47 (0): V1:SIB2_B2_QD2_18MHz_V_I_0 [click here to expand/hide] [link to here]


V48 (0): V1:SIB2_B2_QD2_18MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V49 (0): V1:SIB2_B2_QD2_18MHz_SUM_I_0 [click here to expand/hide] [link to here]


V50 (0): V1:SIB2_B2_QD2_18MHz_H_Q_0 [click here to expand/hide] [link to here]


V51 (0): V1:SIB2_B2_QD2_18MHz_H_I_0 [click here to expand/hide] [link to here]


V52 (0): V1:SIB2_B2_QD2_16MHz_V_norm_0 [click here to expand/hide] [link to here]


V53 (0): V1:SIB2_B2_QD2_16MHz_V_0 [click here to expand/hide] [link to here]


V54 (0): V1:SIB2_B2_QD2_16MHz_Sum_0 [click here to expand/hide] [link to here]


V55 (0): V1:SIB2_B2_QD2_16MHz_H_norm_0 [click here to expand/hide] [link to here]


V56 (0): V1:SIB2_B2_QD2_16MHz_H_0 [click here to expand/hide] [link to here]


V57 (0): V1:SIB2_B2_QD2_14MHz_V_Q_0 [click here to expand/hide] [link to here]


V58 (0): V1:SIB2_B2_QD2_14MHz_V_I_0 [click here to expand/hide] [link to here]


V59 (0): V1:SIB2_B2_QD2_14MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V60 (0): V1:SIB2_B2_QD2_14MHz_SUM_I_0 [click here to expand/hide] [link to here]


V61 (0): V1:SIB2_B2_QD2_14MHz_H_Q_0 [click here to expand/hide] [link to here]


V62 (0): V1:SIB2_B2_QD2_14MHz_H_I_0 [click here to expand/hide] [link to here]


V63 (0): V1:SIB2_B2_QD1_GALVO_V_CORR_notsafe_0 [click here to expand/hide] [link to here]


V64 (0): V1:SIB2_B2_QD1_GALVO_V_CORR_0 [click here to expand/hide] [link to here]


V65 (0): V1:SIB2_B2_QD1_GALVO_H_CORR_notsafe_0 [click here to expand/hide] [link to here]


V66 (0): V1:SIB2_B2_QD1_GALVO_H_CORR_0 [click here to expand/hide] [link to here]


V67 (0): V1:SIB2_B2_QD1_8MHz_V_Q_0 [click here to expand/hide] [link to here]


V68 (0): V1:SIB2_B2_QD1_8MHz_V_I_0 [click here to expand/hide] [link to here]


V69 (0): V1:SIB2_B2_QD1_8MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V70 (0): V1:SIB2_B2_QD1_8MHz_H_Q_0 [click here to expand/hide] [link to here]


V71 (0): V1:SIB2_B2_QD1_8MHz_H_I_0 [click here to expand/hide] [link to here]


V72 (0): V1:SIB2_B2_QD1_48MHz_V_Q_0 [click here to expand/hide] [link to here]


V73 (0): V1:SIB2_B2_QD1_48MHz_V_I_0 [click here to expand/hide] [link to here]


V74 (0): V1:SIB2_B2_QD1_48MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V75 (0): V1:SIB2_B2_QD1_48MHz_SUM_I_0 [click here to expand/hide] [link to here]


V76 (0): V1:SIB2_B2_QD1_48MHz_H_Q_0 [click here to expand/hide] [link to here]


V77 (0): V1:SIB2_B2_QD1_48MHz_H_I_0 [click here to expand/hide] [link to here]


V78 (0): V1:SIB2_B2_QD1_2f_centering_0 [click here to expand/hide] [link to here]


V79 (0): V1:SIB2_B2_QD1_18MHz_V_Q_0 [click here to expand/hide] [link to here]


V80 (0): V1:SIB2_B2_QD1_18MHz_V_I_0 [click here to expand/hide] [link to here]


V81 (0): V1:SIB2_B2_QD1_18MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V82 (0): V1:SIB2_B2_QD1_18MHz_SUM_I_0 [click here to expand/hide] [link to here]


V83 (0): V1:SIB2_B2_QD1_18MHz_H_Q_0 [click here to expand/hide] [link to here]


V84 (0): V1:SIB2_B2_QD1_18MHz_H_I_0 [click here to expand/hide] [link to here]


V85 (0): V1:SIB2_B2_QD1_16MHz_V_0 [click here to expand/hide] [link to here]


V86 (0): V1:SIB2_B2_QD1_16MHz_Sum_0 [click here to expand/hide] [link to here]


V87 (0): V1:SIB2_B2_QD1_16MHz_H_0 [click here to expand/hide] [link to here]


V88 (0): V1:SIB2_B2_QD1_14MHz_V_Q_0 [click here to expand/hide] [link to here]


V89 (0): V1:SIB2_B2_QD1_14MHz_V_I_0 [click here to expand/hide] [link to here]


V90 (0): V1:SIB2_B2_QD1_14MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V91 (0): V1:SIB2_B2_QD1_14MHz_SUM_I_0 [click here to expand/hide] [link to here]


V92 (0): V1:SIB2_B2_QD1_14MHz_H_Q_0 [click here to expand/hide] [link to here]


V93 (0): V1:SIB2_B2_QD1_14MHz_H_I_0 [click here to expand/hide] [link to here]


V94 (0): V1:SIB2_B2_PD3_VBias_0 [click here to expand/hide] [link to here]


V95 (0): V1:SIB2_B2_PD3_IBias_0 [click here to expand/hide] [link to here]


V96 (0): V1:SIB2_B2_PD3_18MHz_Q_0 [click here to expand/hide] [link to here]


V97 (0): V1:SIB2_B2_PD3_12MHz_phi_0 [click here to expand/hide] [link to here]


V98 (0): V1:SIB2_B2_PD2_VBias_0 [click here to expand/hide] [link to here]


V99 (0): V1:SIB2_B2_PD2_4MHz_phi_0 [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr