UPV analysis over V1:Hrec_hoft_16384Hz


upv ./segments.txt ./parameters.txt 

Summary

UPV version:3.2.0: documentation gitlab repository
UPV run by:unknown
UPV processing time:0 h, 24 min, 25 s
Processing Date:Thu Feb 13 10:13:26 2025 (UTC)
Requested start:1420288240 → Tue Jan 7 12:30:22 2025 (UTC)
Requested stop:1421478029 → Tue Jan 21 07:00:11 2025 (UTC)
Requested livetime:825629 sec → 9.556 days
Requested segments:upv.insegments.txt
Summary text file:upv.summary.txt
Number of source channels:100 (out of 100)

Parameters

Configuration:upv.parameters.txt
Target SNR selection:SNR > 7.000
Target frequency selection:16.000 Hz < f < 1956.764 Hz
Coincidence time window:δt = 1.000 s
Veto definition:use-percentage > 0.400 (per frequency bin)
number of used source clusters > 10 (per frequency bin)

Target = V1:Hrec_hoft_16384Hz

Note: these plots includes the triggers used in the VetoPerf report: the selection can be different from the one used for UPV.


Veto performance

The veto performance has been measured. See the VetoPerf report.


V0 (1084): V1:SDB2_B1s_PD1_Blended_0 [click here to expand/hide] [link to here]


V1 (1076): V1:SDB2_B1s_PD1_Audio_ool_0 [click here to expand/hide] [link to here]


V2 (687): V1:SDB2_CAL_B1p_PD1_Audio_10kHz_0 [click here to expand/hide] [link to here]


V3 (675): V1:SDB2_CAL_B1p_PD1_Blended_10kHz_0 [click here to expand/hide] [link to here]


V4 (218): V1:SDB2_B5_PD2_DC_0 [click here to expand/hide] [link to here]


V5 (218): V1:SDB2_B5_PD2_Blended_0 [click here to expand/hide] [link to here]


V6 (218): V1:SDB2_B5_DC_0 [click here to expand/hide] [link to here]


V7 (209): V1:SDB2_B5_PD2_Audio_0 [click here to expand/hide] [link to here]


V8 (208): V1:SDB2_B5_PD2_Audio_ool_0 [click here to expand/hide] [link to here]


V9 (207): V1:SDB2_B5P_PD1_Audio_0 [click here to expand/hide] [link to here]


V10 (168): V1:SDB2_B1s_PD1_DC_0 [click here to expand/hide] [link to here]


V11 (148): V1:SDB2_B5_QD1_50MHz_SUM_I_0 [click here to expand/hide] [link to here]


V12 (139): V1:SDB2_B5P_PD1_DC_0 [click here to expand/hide] [link to here]


V13 (135): V1:SDB2_B5_QD2_50MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V14 (128): V1:SDB2_B5_QD2_6MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V15 (108): V1:SDB2_B5_QD2_6MHz_V_Q_0 [click here to expand/hide] [link to here]


V16 (103): V1:SDB2_B5_QD2_6MHz_SUM_I_0 [click here to expand/hide] [link to here]


V17 (99): V1:SDB2_B5_PD2_56MHz_I_0 [click here to expand/hide] [link to here]


V18 (99): V1:SDB2_B5_56MHz_I_0 [click here to expand/hide] [link to here]


V19 (98): V1:SDB2_B5P_PD1_56MHz_I_0 [click here to expand/hide] [link to here]


V20 (91): V1:SDB2_B5_QD1_6MHz_SUM_I_0 [click here to expand/hide] [link to here]


V21 (91): V1:SDB2_B5_QD1_50MHz_H_I_0 [click here to expand/hide] [link to here]


V22 (83): V1:SDB2_B5_QD1_6MHz_V_I_0 [click here to expand/hide] [link to here]


V23 (81): V1:SDB2_CAL_B1p_PD2_Blended_10kHz_0 [click here to expand/hide] [link to here]


V24 (81): V1:SDB2_CAL_B1p_PD2_Audio_10kHz_0 [click here to expand/hide] [link to here]


V25 (78): V1:SDB2_B5_QD2_56MHz_V_Q_0 [click here to expand/hide] [link to here]


V26 (77): V1:SDB2_B5_QD2_50MHz_H_Q_0 [click here to expand/hide] [link to here]


V27 (76): V1:SDB2_B5_QD2_50MHz_V_Q_0 [click here to expand/hide] [link to here]


V28 (75): V1:SDB2_B5_QD2_6MHz_H_Q_0 [click here to expand/hide] [link to here]


V29 (75): V1:SDB2_B5_QD2_50MHz_H_I_0 [click here to expand/hide] [link to here]


V30 (73): V1:SDB2_B5_QD2_56MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V31 (71): V1:SDB2_B5_QD2_6MHz_V_I_0 [click here to expand/hide] [link to here]


V32 (70): V1:SDB2_B5_QD1_6MHz_H_I_0 [click here to expand/hide] [link to here]


V33 (69): V1:SDB2_B5_QD1_50MHz_V_I_0 [click here to expand/hide] [link to here]


V34 (65): V1:SDB2_B5_QD2_50MHz_SUM_I_0 [click here to expand/hide] [link to here]


V35 (64): V1:SDB2_B5_QD2_V_norm_0 [click here to expand/hide] [link to here]


V36 (60): V1:SDB2_B5_QD2_H_norm_0 [click here to expand/hide] [link to here]


V37 (55): V1:SDB2_B5_QD2_Sum_0 [click here to expand/hide] [link to here]


V38 (55): V1:SDB2_B5_QD1_56MHz_V_Q_0 [click here to expand/hide] [link to here]


V39 (53): V1:SDB2_B5_QD1_112MHz_Sum_0 [click here to expand/hide] [link to here]


V40 (53): V1:SDB2_B5_PD2_12MHz_mag_0 [click here to expand/hide] [link to here]


V41 (53): V1:SDB2_B5_12MHz_mag_0 [click here to expand/hide] [link to here]


V42 (43): V1:SDB2_B5_QD2_112MHz_H_norm_0 [click here to expand/hide] [link to here]


V43 (42): V1:SDB2_B5_QD2_112MHz_H_0 [click here to expand/hide] [link to here]


V44 (41): V1:SDB2_CAL_B1p_PD1_DC_10kHz_0 [click here to expand/hide] [link to here]


V45 (40): V1:SDB2_B5_QD1_V_0 [click here to expand/hide] [link to here]


V46 (40): V1:SDB2_B5_QD1_56MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V47 (38): V1:SDB2_B5_QD2_112MHz_V_norm_0 [click here to expand/hide] [link to here]


V48 (38): V1:SDB2_B5_QD2_112MHz_V_0 [click here to expand/hide] [link to here]


V49 (36): V1:SDB2_B5_QD1_H_norm_0 [click here to expand/hide] [link to here]


V50 (36): V1:SDB2_B5_QD1_112MHz_V_0 [click here to expand/hide] [link to here]


V51 (35): V1:SDB2_B5_QD2_112MHz_Sum_0 [click here to expand/hide] [link to here]


V52 (35): V1:SDB2_B5_QD1_6MHz_V_Q_0 [click here to expand/hide] [link to here]


V53 (35): V1:SDB2_B5P_PD1_112MHz_mag_0 [click here to expand/hide] [link to here]


V54 (34): V1:SDB2_B5_PD2_56MHz_Q_0 [click here to expand/hide] [link to here]


V55 (34): V1:SDB2_B5_PD2_112MHz_mag_0 [click here to expand/hide] [link to here]


V56 (34): V1:SDB2_B5_56MHz_Q_0 [click here to expand/hide] [link to here]


V57 (34): V1:SDB2_B5_112MHz_mag_0 [click here to expand/hide] [link to here]


V58 (33): V1:SDB2_B5_QD2_56MHz_H_Q_0 [click here to expand/hide] [link to here]


V59 (33): V1:SDB2_B5_QD1_Sum_0 [click here to expand/hide] [link to here]


V60 (32): V1:SDB2_B5_QD2_56MHz_SUM_I_0 [click here to expand/hide] [link to here]


V61 (32): V1:SDB2_B5_QD1_112MHz_H_0 [click here to expand/hide] [link to here]


V62 (30): V1:SDB2_B5_QD2_GALVO_V_CORR_notsafe_0 [click here to expand/hide] [link to here]


V63 (30): V1:SDB2_B5_QD2_GALVO_V_CORR_0 [click here to expand/hide] [link to here]


V64 (28): V1:SDB2_B5_QD2_GALVO_H_CORR_notsafe_0 [click here to expand/hide] [link to here]


V65 (28): V1:SDB2_B5_QD2_GALVO_H_CORR_0 [click here to expand/hide] [link to here]


V66 (28): V1:SDB2_B5_QD1_H_0 [click here to expand/hide] [link to here]


V67 (27): V1:SDB2_B5_QD2_56MHz_V_I_0 [click here to expand/hide] [link to here]


V68 (25): V1:SDB2_B5_QD2_6MHz_H_I_0 [click here to expand/hide] [link to here]


V69 (24): V1:SDB2_B5_QD2_V_0 [click here to expand/hide] [link to here]


V70 (24): V1:SDB2_B5_QD1_GALVO_H_CORR_notsafe_0 [click here to expand/hide] [link to here]


V71 (24): V1:SDB2_B5_QD1_GALVO_H_CORR_0 [click here to expand/hide] [link to here]


V72 (22): V1:SDB2_B5_QD1_56MHz_SUM_I_0 [click here to expand/hide] [link to here]


V73 (16): V1:SDB2_B5_QD2_H_0 [click here to expand/hide] [link to here]


V74 (16): V1:SDB2_B5_QD1_6MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V75 (14): V1:SDB2_B5_QD2_56MHz_H_I_0 [click here to expand/hide] [link to here]


V76 (14): V1:SDB2_B5_QD2_50MHz_V_I_0 [click here to expand/hide] [link to here]


V77 (14): V1:SDB2_B5_QD1_GALVO_V_CORR_notsafe_0 [click here to expand/hide] [link to here]


V78 (14): V1:SDB2_B5_QD1_GALVO_V_CORR_0 [click here to expand/hide] [link to here]


V79 (13): V1:SDB2_B5_QD1_V_norm_0 [click here to expand/hide] [link to here]


V80 (11): V1:SDB2_B5_QD1_56MHz_H_Q_0 [click here to expand/hide] [link to here]


V81 (0): V1:SDB2_Clock_100MHz_phi_0 [click here to expand/hide] [link to here]


V82 (0): V1:SDB2_Clock_100MHz_mag_0 [click here to expand/hide] [link to here]


V83 (0): V1:SDB2_CAL_B1p_PD2_DC_10kHz_0 [click here to expand/hide] [link to here]


V84 (0): V1:SDB2_B5_QD1_6MHz_H_Q_0 [click here to expand/hide] [link to here]


V85 (0): V1:SDB2_B5_QD1_56MHz_V_I_0 [click here to expand/hide] [link to here]


V86 (0): V1:SDB2_B5_QD1_56MHz_H_I_0 [click here to expand/hide] [link to here]


V87 (0): V1:SDB2_B5_QD1_50MHz_V_Q_0 [click here to expand/hide] [link to here]


V88 (0): V1:SDB2_B5_QD1_50MHz_SUM_Q_0 [click here to expand/hide] [link to here]


V89 (0): V1:SDB2_B5_QD1_50MHz_H_Q_0 [click here to expand/hide] [link to here]


V90 (0): V1:SDB2_B5_PD2_VBias_0 [click here to expand/hide] [link to here]


V91 (0): V1:SDB2_B5_PD2_IBias_0 [click here to expand/hide] [link to here]


V92 (0): V1:SDB2_B5_PD2_12MHz_phi_0 [click here to expand/hide] [link to here]


V93 (0): V1:SDB2_B5_PD2_112MHz_phi_0 [click here to expand/hide] [link to here]


V94 (0): V1:SDB2_B5P_PD1_VBias_0 [click here to expand/hide] [link to here]


V95 (0): V1:SDB2_B5P_PD1_IBias_0 [click here to expand/hide] [link to here]


V96 (0): V1:SDB2_B5P_PD1_56MHz_Q_0 [click here to expand/hide] [link to here]


V97 (0): V1:SDB2_B5P_PD1_112MHz_phi_0 [click here to expand/hide] [link to here]


V98 (0): V1:SDB2_B1s_PD1_VBias_0 [click here to expand/hide] [link to here]


V99 (0): V1:SDB2_B1s_PD1_IBias_0 [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr