OUTPUT  DIRECTORY  ./report
OUTPUT  VERBOSITY  1

TARGET  OMICRON    V1:Hrec_hoft_16384Hz
TARGET  CLUSTERDT  0.1
TARGET  SNRMIN     6

COINC   TIMEWIN    1.0

VETO    UPMIN      0.4
VETO    UMIN       10
VETO    PRINT      0
VETO    PERF       5  8  10  20
VETO    PERFPRINT  1  0

SOURCE  CLUSTERDT  0.1
SOURCE  OMICRON    V1:Sc_SR_F7_COIL_V3
SOURCE  OMICRON    V1:Sc_SR_F7_LVDT_H1
SOURCE  OMICRON    V1:Sc_SR_F7_LVDT_H2
SOURCE  OMICRON    V1:Sc_SR_F7_LVDT_H3
SOURCE  OMICRON    V1:Sc_SR_F7_LVDT_V1
SOURCE  OMICRON    V1:Sc_SR_F7_LVDT_V2
SOURCE  OMICRON    V1:Sc_SR_F7_LVDT_V3
SOURCE  OMICRON    V1:Sc_SR_F7_TX
SOURCE  OMICRON    V1:Sc_SR_F7_TX_CORR
SOURCE  OMICRON    V1:Sc_SR_F7_TY
SOURCE  OMICRON    V1:Sc_SR_F7_TY_CORR
SOURCE  OMICRON    V1:Sc_SR_F7_TZ
SOURCE  OMICRON    V1:Sc_SR_F7_TZ_CORR
SOURCE  OMICRON    V1:Sc_SR_F7_X
SOURCE  OMICRON    V1:Sc_SR_F7_Y
SOURCE  OMICRON    V1:Sc_SR_F7_Z
SOURCE  OMICRON    V1:Sc_SR_MAR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDM_PWR
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDM_X1
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDM_X2
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDM_Y1
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDM_Y2
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDT_PWR
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDT_X1
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDT_X2
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDT_Y1
SOURCE  OMICRON    V1:Sc_SR_MAR_PSDT_Y2
SOURCE  OMICRON    V1:Sc_SR_MAR_TX
SOURCE  OMICRON    V1:Sc_SR_MAR_TX_CORR
SOURCE  OMICRON    V1:Sc_SR_MAR_TY
SOURCE  OMICRON    V1:Sc_SR_MAR_TY_CORR
SOURCE  OMICRON    V1:Sc_SR_MAR_TY_T
SOURCE  OMICRON    V1:Sc_SR_MAR_TZ
SOURCE  OMICRON    V1:Sc_SR_MAR_TZ_CORR
SOURCE  OMICRON    V1:Sc_SR_MAR_Z_CORR
SOURCE  OMICRON    V1:Sc_SR_MIR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_SR_MIR_LSC_CORR
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDF_PWR
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDF_X1
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDF_X2
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDF_Y1
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDF_Y2
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDI_PWR
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDI_X1
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDI_X2
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDI_Y1
SOURCE  OMICRON    V1:Sc_SR_MIR_PSDI_Y2
SOURCE  OMICRON    V1:Sc_SR_MIR_TX
SOURCE  OMICRON    V1:Sc_SR_MIR_TY
SOURCE  OMICRON    V1:Sc_SR_MIR_VOUT_DL
SOURCE  OMICRON    V1:Sc_SR_MIR_VOUT_DR
SOURCE  OMICRON    V1:Sc_SR_MIR_VOUT_UL
SOURCE  OMICRON    V1:Sc_SR_MIR_VOUT_UR
SOURCE  OMICRON    V1:Sc_SR_MIR_Z
SOURCE  OMICRON    V1:Sc_SR_MIR_Z_CORR
SOURCE  OMICRON    V1:Sc_SR_noise
SOURCE  OMICRON    V1:Sc_WE_ErrPost
SOURCE  OMICRON    V1:Sc_WE_F7_LVDT_H1
SOURCE  OMICRON    V1:Sc_WE_F7_LVDT_H2
SOURCE  OMICRON    V1:Sc_WE_F7_LVDT_H3
SOURCE  OMICRON    V1:Sc_WE_F7_LVDT_V1
SOURCE  OMICRON    V1:Sc_WE_F7_LVDT_V2
SOURCE  OMICRON    V1:Sc_WE_F7_LVDT_V3
SOURCE  OMICRON    V1:Sc_WE_F7_TX
SOURCE  OMICRON    V1:Sc_WE_F7_TX_CORR
SOURCE  OMICRON    V1:Sc_WE_F7_TY
SOURCE  OMICRON    V1:Sc_WE_F7_TY_CORR
SOURCE  OMICRON    V1:Sc_WE_F7_TZ
SOURCE  OMICRON    V1:Sc_WE_F7_TZ_CORR
SOURCE  OMICRON    V1:Sc_WE_F7_X
SOURCE  OMICRON    V1:Sc_WE_F7_X_CORR
SOURCE  OMICRON    V1:Sc_WE_F7_Y
SOURCE  OMICRON    V1:Sc_WE_F7_Z
SOURCE  OMICRON    V1:Sc_WE_MAR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDM_PWR
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDM_X1
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDM_X2
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDM_Y1
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDM_Y2
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDT_PWR
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDT_X1
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDT_Y1
SOURCE  OMICRON    V1:Sc_WE_MAR_PSDT_Y2
SOURCE  OMICRON    V1:Sc_WE_MAR_TX
SOURCE  OMICRON    V1:Sc_WE_MAR_TX_CORR
SOURCE  OMICRON    V1:Sc_WE_MAR_TY
SOURCE  OMICRON    V1:Sc_WE_MAR_TY_CORR
SOURCE  OMICRON    V1:Sc_WE_MAR_TY_T
SOURCE  OMICRON    V1:Sc_WE_MAR_TZ
SOURCE  OMICRON    V1:Sc_WE_MAR_TZ_CORR
SOURCE  OMICRON    V1:Sc_WE_MAR_Y_CORR
SOURCE  OMICRON    V1:Sc_WE_MIR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_WE_MIR_LSC_CORR
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDF_PWR
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDF_X1
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDF_X2
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDF_Y1
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDF_Y2
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDI_PWR
SOURCE  OMICRON    V1:Sc_WE_MIR_PSDI_X1