OUTPUT  DIRECTORY  ./report
OUTPUT  VERBOSITY  1

TARGET  OMICRON    V1:Hrec_hoft_16384Hz
TARGET  CLUSTERDT  0.1
TARGET  SNRMIN     6

COINC   TIMEWIN    1.0

VETO    UPMIN      0.4
VETO    UMIN       10
VETO    PRINT      0
VETO    PERF       5  8  10  20
VETO    PERFPRINT  1  0

SOURCE  CLUSTERDT  0.1
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_PWR
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_X1
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_X2
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_Y1
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDF_Y2
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDI_PWR
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDI_X2
SOURCE  OMICRON    V1:Sc_BS_MIR_PSDI_Y2
SOURCE  OMICRON    V1:Sc_BS_MIR_TX
SOURCE  OMICRON    V1:Sc_BS_MIR_TX_AA
SOURCE  OMICRON    V1:Sc_BS_MIR_TY
SOURCE  OMICRON    V1:Sc_BS_MIR_TY_AA
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_DL
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_DR
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_UL
SOURCE  OMICRON    V1:Sc_BS_MIR_VOUT_UR
SOURCE  OMICRON    V1:Sc_BS_MIR_Z
SOURCE  OMICRON    V1:Sc_BS_MIR_Z_CORR
SOURCE  OMICRON    V1:Sc_BS_MIR_Z_CORR_LN
SOURCE  OMICRON    V1:Sc_BS_fModErr
SOURCE  OMICRON    V1:Sc_BS_noise
SOURCE  OMICRON    V1:Sc_IB_AAsw
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_PWR
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_X1
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_X2
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_Y1
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDF_Y2
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDI_PWR
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDI_X1
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDI_X2
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDI_Y1
SOURCE  OMICRON    V1:Sc_IB_BENCH_PSDI_Y2
SOURCE  OMICRON    V1:Sc_IB_BENCH_TX
SOURCE  OMICRON    V1:Sc_IB_BENCH_TY
SOURCE  OMICRON    V1:Sc_IB_BENCH_Z
SOURCE  OMICRON    V1:Sc_IB_BPCtxD
SOURCE  OMICRON    V1:Sc_IB_BPCtyD
SOURCE  OMICRON    V1:Sc_IB_IMC_Tra
SOURCE  OMICRON    V1:Sc_IB_INJ_RFC_PWR
SOURCE  OMICRON    V1:Sc_IB_INJ_tx
SOURCE  OMICRON    V1:Sc_IB_INJ_ty
SOURCE  OMICRON    V1:Sc_IB_INJ_tz
SOURCE  OMICRON    V1:Sc_IB_MAR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_IB_MAR_PSDT_PWR
SOURCE  OMICRON    V1:Sc_IB_MAR_PSDT_X1
SOURCE  OMICRON    V1:Sc_IB_MAR_PSDT_X2
SOURCE  OMICRON    V1:Sc_IB_MAR_PSDT_Y1
SOURCE  OMICRON    V1:Sc_IB_MAR_PSDT_Y2
SOURCE  OMICRON    V1:Sc_IB_MAR_TX_CORR
SOURCE  OMICRON    V1:Sc_IB_MAR_TX_PM
SOURCE  OMICRON    V1:Sc_IB_MAR_TY_CORR
SOURCE  OMICRON    V1:Sc_IB_MAR_TY_PM
SOURCE  OMICRON    V1:Sc_IB_MAR_TY_T
SOURCE  OMICRON    V1:Sc_IB_MAR_TZ
SOURCE  OMICRON    V1:Sc_IB_MAR_TZ_CORR
SOURCE  OMICRON    V1:Sc_IB_MAR_TZ_PM
SOURCE  OMICRON    V1:Sc_IB_MC_TX
SOURCE  OMICRON    V1:Sc_IB_noise
SOURCE  OMICRON    V1:Sc_MC_AAOn_p
SOURCE  OMICRON    V1:Sc_MC_INJ_tx
SOURCE  OMICRON    V1:Sc_MC_INJ_tx_p
SOURCE  OMICRON    V1:Sc_MC_INJ_ty
SOURCE  OMICRON    V1:Sc_MC_INJ_ty_p
SOURCE  OMICRON    V1:Sc_MC_MAR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_MC_MAR_TX_CORR
SOURCE  OMICRON    V1:Sc_MC_MAR_TX_CTRL
SOURCE  OMICRON    V1:Sc_MC_MAR_TY_CORR
SOURCE  OMICRON    V1:Sc_MC_MAR_TY_CTRL
SOURCE  OMICRON    V1:Sc_MC_MAR_TZ_CORR
SOURCE  OMICRON    V1:Sc_MC_MAR_Z_CORR
SOURCE  OMICRON    V1:Sc_MC_MIR_COIL_FLAG
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDF_PWR
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDF_X1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDF_X2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDF_Y1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDF_Y2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDI_PWR
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDI_X1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDI_X2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDI_Y1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDI_Y2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTF_PWR
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTF_X1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTF_X2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTF_Y1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTF_Y2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTI_PWR
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTI_X1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTI_X2
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTI_Y1
SOURCE  OMICRON    V1:Sc_MC_MIR_PSDTI_Y2
SOURCE  OMICRON    V1:Sc_MC_MIR_TX
SOURCE  OMICRON    V1:Sc_MC_MIR_TX_CORR
SOURCE  OMICRON    V1:Sc_MC_MIR_TY
SOURCE  OMICRON    V1:Sc_MC_MIR_TY_CORR
SOURCE  OMICRON    V1:Sc_MC_MIR_VOUT_D
SOURCE  OMICRON    V1:Sc_MC_MIR_VOUT_L
SOURCE  OMICRON    V1:Sc_MC_MIR_VOUT_R
SOURCE  OMICRON    V1:Sc_MC_MIR_VOUT_U
SOURCE  OMICRON    V1:Sc_MC_MIR_Z