UPV analysis over V1:Hrec_hoft_16384Hz


upv ./segments.txt ./parameters.txt 

Summary

UPV version:3.2.0: documentation gitlab repository
UPV run by:unknown
UPV processing time:1 h, 32 min, 2 s
Processing Date:Fri Feb 21 13:33:28 2025 (UTC)
Requested start:1407499998 → Mon Aug 12 12:13:00 2024 (UTC)
Requested stop:1408708852 → Mon Aug 26 12:00:34 2024 (UTC)
Requested livetime:950208 sec → 10.998 days
Requested segments:upv.insegments.txt
Summary text file:upv.summary.txt
Number of source channels:100 (out of 100)

Parameters

Configuration:upv.parameters.txt
Target SNR selection:SNR > 6.000
Target frequency selection:16.000 Hz < f < 1956.764 Hz
Coincidence time window:δt = 1.000 s
Veto definition:use-percentage > 0.400 (per frequency bin)
number of used source clusters > 10 (per frequency bin)

Target = V1:Hrec_hoft_16384Hz

Note: these plots includes the triggers used in the VetoPerf report: the selection can be different from the one used for UPV.


Veto performance

The veto performance has been measured. See the VetoPerf report.


V0 (2563): V1:DET_B1_DC_0 [click here to expand/hide] [link to here]


V1 (645): V1:DET_B1s_DC_0 [click here to expand/hide] [link to here]


V2 (121): V1:EDB_B1p_PD1_Audio_raw_0 [click here to expand/hide] [link to here]


V3 (120): V1:EDB_B1p_PD1_DC_raw_0 [click here to expand/hide] [link to here]


V4 (118): V1:EDB_B1s_QD2_GALVO_X_CORR_notsafe_0 [click here to expand/hide] [link to here]


V5 (118): V1:EDB_B1s_QD2_GALVO_X_CORR_0 [click here to expand/hide] [link to here]


V6 (116): V1:DET_B2_DC_0 [click here to expand/hide] [link to here]


V7 (98): V1:EDB_B1s_QD2_RF_56MHz_Q_OMC_X_I_0 [click here to expand/hide] [link to here]


V8 (97): V1:EDB_B1s_QD2_RF_56MHz_I_OMC_X_I_0 [click here to expand/hide] [link to here]


V9 (91): V1:EDB_B1s_QD1_RF_56MHz_I_OMC_X_I_0 [click here to expand/hide] [link to here]


V10 (90): V1:EDB_B1s_QD1_GALVO_X_CORR_notsafe_0 [click here to expand/hide] [link to here]


V11 (84): V1:DET_B5_DC_0 [click here to expand/hide] [link to here]


V12 (83): V1:EDB_B1s_QD2_RF_56MHz_Q_OMC_X_Q_0 [click here to expand/hide] [link to here]


V13 (82): V1:EDB_B1s_QD2_RF_56MHz_I_OMC_X_Q_0 [click here to expand/hide] [link to here]


V14 (79): V1:EDB_B1s_QD1_RF_56MHz_I_OMC_X_Q_0 [click here to expand/hide] [link to here]


V15 (72): V1:EDB_B1s_QD1_GALVO_X_CORR_0 [click here to expand/hide] [link to here]


V16 (66): V1:EDB_B1s_QD1_RF_56MHz_Q_OMC_X_I_0 [click here to expand/hide] [link to here]


V17 (47): V1:EDB_B1s_QD1_RF_56MHz_Q_OMC_X_Q_0 [click here to expand/hide] [link to here]


V18 (42): V1:EDB_B1s_QD1_SUM_0 [click here to expand/hide] [link to here]


V19 (40): V1:EDB_B1s_QD1_RF_56MHz_Q_OMC_Y_I_0 [click here to expand/hide] [link to here]


V20 (37): V1:EDB_B1s_QD2_RF_56MHz_I_OMC_Y_I_0 [click here to expand/hide] [link to here]


V21 (35): V1:EDB_B1s_QD2_RF_56MHz_I_OMC_Y_Q_0 [click here to expand/hide] [link to here]


V22 (27): V1:EDB_B1s_QD1_RF_56MHz_Q_OMC_Y_Q_0 [click here to expand/hide] [link to here]


V23 (22): V1:DET_B4_DC_0 [click here to expand/hide] [link to here]


V24 (16): V1:EDB_B1s_QD1_RF_56MHz_I_OMC_Y_I_0 [click here to expand/hide] [link to here]


V25 (14): V1:EDB_B1s_QD1_RF_56MHz_X_I_0 [click here to expand/hide] [link to here]


V26 (12): V1:DET_B7_DC_0 [click here to expand/hide] [link to here]


V27 (11): V1:EDB_B1s_QD1_DC1_0 [click here to expand/hide] [link to here]


V28 (0): V1:EDB_B1s_QD2_RF_112MHz_Y_NORM_0 [click here to expand/hide] [link to here]


V29 (0): V1:EDB_B1s_QD2_RF_112MHz_X_NORM_0 [click here to expand/hide] [link to here]


V30 (0): V1:EDB_B1s_QD2_GALVO_Y_CORR_notsafe_0 [click here to expand/hide] [link to here]


V31 (0): V1:EDB_B1s_QD2_GALVO_Y_CORR_0 [click here to expand/hide] [link to here]


V32 (0): V1:EDB_B1s_QD2_DC4_0 [click here to expand/hide] [link to here]


V33 (0): V1:EDB_B1s_QD2_DC3_0 [click here to expand/hide] [link to here]


V34 (0): V1:EDB_B1s_QD2_DC2_0 [click here to expand/hide] [link to here]


V35 (0): V1:EDB_B1s_QD2_DC1_0 [click here to expand/hide] [link to here]


V36 (0): V1:EDB_B1s_QD1_Y_NORM_0 [click here to expand/hide] [link to here]


V37 (0): V1:EDB_B1s_QD1_X_NORM_0 [click here to expand/hide] [link to here]


V38 (0): V1:EDB_B1s_QD1_RF_6MHz_Y_Q_0 [click here to expand/hide] [link to here]


V39 (0): V1:EDB_B1s_QD1_RF_6MHz_Y_NORM_0 [click here to expand/hide] [link to here]


V40 (0): V1:EDB_B1s_QD1_RF_6MHz_Y_I_0 [click here to expand/hide] [link to here]


V41 (0): V1:EDB_B1s_QD1_RF_6MHz_X_Q_0 [click here to expand/hide] [link to here]


V42 (0): V1:EDB_B1s_QD1_RF_6MHz_X_NORM_0 [click here to expand/hide] [link to here]


V43 (0): V1:EDB_B1s_QD1_RF_6MHz_X_I_0 [click here to expand/hide] [link to here]


V44 (0): V1:EDB_B1s_QD1_RF_5MHz_Y_Q_0 [click here to expand/hide] [link to here]


V45 (0): V1:EDB_B1s_QD1_RF_5MHz_Y_NORM_0 [click here to expand/hide] [link to here]


V46 (0): V1:EDB_B1s_QD1_RF_5MHz_Y_I_0 [click here to expand/hide] [link to here]


V47 (0): V1:EDB_B1s_QD1_RF_5MHz_X_Q_0 [click here to expand/hide] [link to here]


V48 (0): V1:EDB_B1s_QD1_RF_5MHz_X_NORM_0 [click here to expand/hide] [link to here]


V49 (0): V1:EDB_B1s_QD1_RF_5MHz_X_I_0 [click here to expand/hide] [link to here]


V50 (0): V1:EDB_B1s_QD1_RF_56MHz_Y_Q_0 [click here to expand/hide] [link to here]


V51 (0): V1:EDB_B1s_QD1_RF_56MHz_Y_NORM_0 [click here to expand/hide] [link to here]


V52 (0): V1:EDB_B1s_QD1_RF_56MHz_Y_I_0 [click here to expand/hide] [link to here]


V53 (0): V1:EDB_B1s_QD1_RF_56MHz_X_Q_0 [click here to expand/hide] [link to here]


V54 (0): V1:EDB_B1s_QD1_RF_56MHz_X_NORM_0 [click here to expand/hide] [link to here]


V55 (0): V1:EDB_B1s_QD1_RF_56MHz_I_OMC_Y_Q_0 [click here to expand/hide] [link to here]


V56 (0): V1:EDB_B1s_QD1_RF_112MHz_Y_NORM_0 [click here to expand/hide] [link to here]


V57 (0): V1:EDB_B1s_QD1_RF_112MHz_X_NORM_0 [click here to expand/hide] [link to here]


V58 (0): V1:EDB_B1s_QD1_GALVO_Y_CORR_notsafe_0 [click here to expand/hide] [link to here]


V59 (0): V1:EDB_B1s_QD1_GALVO_Y_CORR_0 [click here to expand/hide] [link to here]


V60 (0): V1:EDB_B1s_QD1_DC4_0 [click here to expand/hide] [link to here]


V61 (0): V1:EDB_B1s_QD1_DC3_0 [click here to expand/hide] [link to here]


V62 (0): V1:EDB_B1s_QD1_DC2_0 [click here to expand/hide] [link to here]


V63 (0): V1:EDB_B1s1_PD1_VBias_0 [click here to expand/hide] [link to here]


V64 (0): V1:EDB_B1s1_PD1_IBias_0 [click here to expand/hide] [link to here]


V65 (0): V1:EDB_B1s1_DC_10KHz_0 [click here to expand/hide] [link to here]


V66 (0): V1:EDB_B1s1_Audio_10KHz_0 [click here to expand/hide] [link to here]


V67 (0): V1:EDB_B1p_SFP_RAMP_raw_0 [click here to expand/hide] [link to here]


V68 (0): V1:EDB_B1p_SFP_RAMP_0 [click here to expand/hide] [link to here]


V69 (0): V1:EDB_B1p_SFP_PD_raw_0 [click here to expand/hide] [link to here]


V70 (0): V1:EDB_B1p_SFP_PD_0 [click here to expand/hide] [link to here]


V71 (0): V1:EDB_B1p_SFP_OFFSET_0 [click here to expand/hide] [link to here]


V72 (0): V1:EDB_B1p_PD1_VBias_0 [click here to expand/hide] [link to here]


V73 (0): V1:EDB_B1p_PD1_IBias_0 [click here to expand/hide] [link to here]


V74 (0): V1:EDB_B1p_PC_AdcMinVal_0 [click here to expand/hide] [link to here]


V75 (0): V1:EDB_B1p_PC_AdcMaxVal_0 [click here to expand/hide] [link to here]


V76 (0): V1:DET_B8_DC_0 [click here to expand/hide] [link to here]


V77 (0): V1:DET_B1p_DC_0 [click here to expand/hide] [link to here]


V78 (0): V1:DAQ_WR_TDBv1_phi_0 [click here to expand/hide] [link to here]


V79 (0): V1:DAQ_WR_TDBv1_mag_0 [click here to expand/hide] [link to here]


V80 (0): V1:DAQ_WR_NODE_phi_0 [click here to expand/hide] [link to here]


V81 (0): V1:DAQ_WR_NODE_mag_0 [click here to expand/hide] [link to here]


V82 (0): V1:DAQ_WR_GPS_S650_phi_0 [click here to expand/hide] [link to here]


V83 (0): V1:DAQ_WR_GPS_S650_mag_0 [click here to expand/hide] [link to here]


V84 (0): V1:DAQ_TDBv2_return_phi_0 [click here to expand/hide] [link to here]


V85 (0): V1:DAQ_TDBv2_return_mag_0 [click here to expand/hide] [link to here]


V86 (0): V1:DAQ_TDBv2_phi_0 [click here to expand/hide] [link to here]


V87 (0): V1:DAQ_TDBv2_mag_0 [click here to expand/hide] [link to here]


V88 (0): V1:DAQ_TDBv1_phi_0 [click here to expand/hide] [link to here]


V89 (0): V1:DAQ_TDBv1_mag_0 [click here to expand/hide] [link to here]


V90 (0): V1:DAQ_SQZ_Clock_100MHz_raw_phi_0 [click here to expand/hide] [link to here]


V91 (0): V1:DAQ_SQZ_Clock_100MHz_raw_mag_0 [click here to expand/hide] [link to here]


V92 (0): V1:DAQ_GPS_S650_phi_0 [click here to expand/hide] [link to here]


V93 (0): V1:DAQ_GPS_S650_mag_0 [click here to expand/hide] [link to here]


V94 (0): V1:CALnoise_elapsed_time_0 [click here to expand/hide] [link to here]


V95 (0): V1:CALnoise_CfgChange_0 [click here to expand/hide] [link to here]


V96 (0): V1:CAL_SR_MAR_Z_CORR_0 [click here to expand/hide] [link to here]


V97 (0): V1:CAL_PR_MAR_Z_CORR_0 [click here to expand/hide] [link to here]


V98 (0): V1:CAL_NE_MIR_Z_NOISE_NO_HI_0 [click here to expand/hide] [link to here]


V99 (0): V1:CAL_NE_MIR_Z_NOISE_0 [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr