OUTPUT  DIRECTORY  ./report
OUTPUT  VERBOSITY  1

TARGET  OMICRON    V1:Hrec_hoft_16384Hz
TARGET  CLUSTERDT  0.1
TARGET  SNRMIN     6

COINC   TIMEWIN    1.0

VETO    UPMIN      0.4
VETO    UMIN       10
VETO    PRINT      0
VETO    PERF       5  8  10  20
VETO    PERFPRINT  1  0

SOURCE  CLUSTERDT  0.1
SOURCE  OMICRON    V1:SQB1_LC_X_corr
SOURCE  OMICRON    V1:SQB1_LC_X_err
SOURCE  OMICRON    V1:SQB1_LC_Y
SOURCE  OMICRON    V1:SQB1_LC_Y_corr
SOURCE  OMICRON    V1:SQB1_LC_Y_err
SOURCE  OMICRON    V1:SQB1_LC_Y_err_ground_corrected
SOURCE  OMICRON    V1:SQB1_LC_Z
SOURCE  OMICRON    V1:SQB1_LC_Z_corr
SOURCE  OMICRON    V1:SQB1_LC_Z_err
SOURCE  OMICRON    V1:SQB1_LC_Z_err_ground_corrected
SOURCE  OMICRON    V1:SQB1_LC_elapsed_time
SOURCE  OMICRON    V1:SQB1_PSD1_H_norm_clean
SOURCE  OMICRON    V1:SQB1_PSD1_V_norm_clean
SOURCE  OMICRON    V1:SQB1_PSD2_H_norm_clean
SOURCE  OMICRON    V1:SQB1_PSD2_V_norm_clean
SOURCE  OMICRON    V1:SQB1_PSD3_H_norm_clean
SOURCE  OMICRON    V1:SQB1_PSD3_V_norm_clean
SOURCE  OMICRON    V1:SQB1_SBE_CfgChange
SOURCE  OMICRON    V1:SQB1_SBE_elapsed_time
SOURCE  OMICRON    V1:SQB1_Tpro_elapsed_time
SOURCE  OMICRON    V1:SQB1_Tpro_processed_packets
SOURCE  OMICRON    V1:SQB2_GR_PSD1_H
SOURCE  OMICRON    V1:SQB2_GR_PSD1_H_45
SOURCE  OMICRON    V1:SQB2_GR_PSD1_H_norm
SOURCE  OMICRON    V1:SQB2_GR_PSD1_SUM
SOURCE  OMICRON    V1:SQB2_GR_PSD1_V
SOURCE  OMICRON    V1:SQB2_GR_PSD1_V_45
SOURCE  OMICRON    V1:SQB2_GR_PSD1_V_norm
SOURCE  OMICRON    V1:SQB2_GR_PSD2_H
SOURCE  OMICRON    V1:SQB2_GR_PSD2_H_45
SOURCE  OMICRON    V1:SQB2_GR_PSD2_H_norm
SOURCE  OMICRON    V1:SQB2_GR_PSD2_SUM
SOURCE  OMICRON    V1:SQB2_GR_PSD2_V
SOURCE  OMICRON    V1:SQB2_GR_PSD2_V_45
SOURCE  OMICRON    V1:SQB2_GR_PSD2_V_norm
SOURCE  OMICRON    V1:SQB2_GR_PSD3_H
SOURCE  OMICRON    V1:SQB2_GR_PSD3_H_45
SOURCE  OMICRON    V1:SQB2_GR_PSD3_H_norm
SOURCE  OMICRON    V1:SQB2_GR_PSD3_SUM
SOURCE  OMICRON    V1:SQB2_GR_PSD3_V
SOURCE  OMICRON    V1:SQB2_GR_PSD3_V_45
SOURCE  OMICRON    V1:SQB2_GR_PSD3_V_norm
SOURCE  OMICRON    V1:SQB2_LC_COIL_BL_H
SOURCE  OMICRON    V1:SQB2_LC_COIL_BL_V
SOURCE  OMICRON    V1:SQB2_LC_COIL_BR_H
SOURCE  OMICRON    V1:SQB2_LC_COIL_BR_V
SOURCE  OMICRON    V1:SQB2_LC_COIL_FL_H
SOURCE  OMICRON    V1:SQB2_LC_COIL_FL_V
SOURCE  OMICRON    V1:SQB2_LC_COIL_FR_H
SOURCE  OMICRON    V1:SQB2_LC_COIL_FR_V
SOURCE  OMICRON    V1:SQB2_LC_CfgChange
SOURCE  OMICRON    V1:SQB2_LC_LVDT_BL_H_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_BL_V_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_BR_H_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_BR_V_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_FL_H_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_FL_V_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_FR_H_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_LVDT_FR_V_out_raw_1000Hz
SOURCE  OMICRON    V1:SQB2_LC_NOISE_flt
SOURCE  OMICRON    V1:SQB2_LC_PSD_TX_A_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TX_B_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TX_C_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TX_E_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TX_err_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TY_A_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TY_B_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TY_C_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TY_D_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TY_E_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TY_err_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TZ_A_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TZ_D_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_TZ_E_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_X_A_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_X_B_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_X_E_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_Y_A_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_Y_B_1kHz
SOURCE  OMICRON    V1:SQB2_LC_PSD_Z_A_1kHz
SOURCE  OMICRON    V1:SQB2_LC_TX
SOURCE  OMICRON    V1:SQB2_LC_TX_PSD_err_1kHz
SOURCE  OMICRON    V1:SQB2_LC_TX_corr
SOURCE  OMICRON    V1:SQB2_LC_TX_err
SOURCE  OMICRON    V1:SQB2_LC_TY
SOURCE  OMICRON    V1:SQB2_LC_TY_PSD_err_1kHz
SOURCE  OMICRON    V1:SQB2_LC_TY_corr
SOURCE  OMICRON    V1:SQB2_LC_TY_err
SOURCE  OMICRON    V1:SQB2_LC_TZ
SOURCE  OMICRON    V1:SQB2_LC_TZ_corr
SOURCE  OMICRON    V1:SQB2_LC_TZ_err
SOURCE  OMICRON    V1:SQB2_LC_X
SOURCE  OMICRON    V1:SQB2_LC_X_corr
SOURCE  OMICRON    V1:SQB2_LC_X_err
SOURCE  OMICRON    V1:SQB2_LC_Y
SOURCE  OMICRON    V1:SQB2_LC_Y_corr
SOURCE  OMICRON    V1:SQB2_LC_Y_err
SOURCE  OMICRON    V1:SQB2_LC_Y_err_ground_corrected
SOURCE  OMICRON    V1:SQB2_LC_Z
SOURCE  OMICRON    V1:SQB2_LC_Z_corr