VetoPerf analysis over V1:Hrec_hoft_16384Hz


Summary

VetoPerf version:3.2.0: documentation gitlab repository
VetoPerf run by:unknown
VetoPerf processing time:0 h, 36 min, 42 s
Processing Date:Fri Feb 21 12:38:23 2025 (UTC)
Requested start:1407499998 → Mon Aug 12 12:13:00 2024 (UTC)
Requested stop:1408708852 → Mon Aug 26 12:00:34 2024 (UTC)
Requested livetime:950014 sec → 10.996 days
Requested segments:vp.insegments.txt
Summary text file:vp.summary.txt

Triggers (V1:Hrec_hoft_16384Hz - OMICRON)

Number of raw triggers:14767220
Number of raw clusters:109188
Number of active clusters:94622 (SNR > 5.000) 1103 (SNR > 8.000) 909 (SNR > 10.000) 734 (SNR > 20.000)

Vetoes

Number of vetoes:100
Dead time: Integrated time when the veto is active. We note d the fraction of the total livetime (950014 s) when the veto is active.
Efficiency (ε):This is the fraction of V1:Hrec_hoft_16384Hz triggers which are vetoed.
ε/d:This factor is larger than 1 when the veto rejects more triggers than a random veto.
V1:Hrec_hoft_16384Hz: 94622 clusters
V0 → V1:SIB2_RFC_QD2_H_0, vetoed clusters: 205 (0.217 %)
V1 → V1:SNEB_B7_QD2_Sum_0, vetoed clusters: 37 (0.039 %)
V2 → V1:SNEB_B7_QD2_H_0, vetoed clusters: 36 (0.038 %)
V3 → V1:SNEB_B7_QD2_V_0, vetoed clusters: 31 (0.033 %)
V4 → V1:SNEB_B7_QD1_V_0, vetoed clusters: 30 (0.032 %)
V5 → V1:SNEB_B7_PD1_DC_0, vetoed clusters: 30 (0.032 %)
V6 → V1:SNEB_B7_QD1_Sum_0, vetoed clusters: 25 (0.026 %)
V7 → V1:SNEB_B7_6MHz_I_0, vetoed clusters: 21 (0.022 %)
V8 → V1:SNEB_B7_PD1_6MHz_I_0, vetoed clusters: 21 (0.022 %)
V9 → V1:SNEB_B7_QD1_H_0, vetoed clusters: 20 (0.021 %)

V0: V1:SIB2_RFC_QD2_H_0 (ε = 0.217%, ε/d = 48.634) [click here to expand/hide] [link to here]


V1: V1:SNEB_B7_QD2_Sum_0 (ε = 0.039%, ε/d = 446.800) [click here to expand/hide] [link to here]


V2: V1:SNEB_B7_QD2_H_0 (ε = 0.038%, ε/d = 483.784) [click here to expand/hide] [link to here]


V3: V1:SNEB_B7_QD2_V_0 (ε = 0.033%, ε/d = 293.940) [click here to expand/hide] [link to here]


V4: V1:SNEB_B7_QD1_V_0 (ε = 0.032%, ε/d = 303.651) [click here to expand/hide] [link to here]


V5: V1:SNEB_B7_PD1_DC_0 (ε = 0.032%, ε/d = 360.472) [click here to expand/hide] [link to here]


V6: V1:SNEB_B7_QD1_Sum_0 (ε = 0.026%, ε/d = 484.109) [click here to expand/hide] [link to here]


V7: V1:SNEB_B7_6MHz_I_0 (ε = 0.022%, ε/d = 540.219) [click here to expand/hide] [link to here]


V8: V1:SNEB_B7_PD1_6MHz_I_0 (ε = 0.022%, ε/d = 540.219) [click here to expand/hide] [link to here]


V9: V1:SNEB_B7_QD1_H_0 (ε = 0.021%, ε/d = 476.190) [click here to expand/hide] [link to here]


V10: V1:SNEB_B7_PD1_Audio_0 (ε = 0.013%, ε/d = 403.667) [click here to expand/hide] [link to here]


V11: V1:SNEB_B7_DC_0 (ε = 0.012%, ε/d = 458.135) [click here to expand/hide] [link to here]


V12: V1:SNEB_B7_DC_D_0 (ε = 0.012%, ε/d = 456.883) [click here to expand/hide] [link to here]


V13: V1:SNEB_B7_PD1_Blended_0 (ε = 0.012%, ε/d = 456.883) [click here to expand/hide] [link to here]


V14: V1:SNEB_B7_PD1_Blended_D_0 (ε = 0.012%, ε/d = 456.883) [click here to expand/hide] [link to here]


V15: V1:SNEB_B7_56MHz_Q_0 (ε = 0.008%, ε/d = 390.504) [click here to expand/hide] [link to here]


V16: V1:SIB2_RFC_QD1_12MHz_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V17: V1:SIB2_RFC_QD1_16MHz_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V18: V1:SIB2_RFC_QD1_16MHz_Sum_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V19: V1:SIB2_RFC_QD1_16MHz_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V20: V1:SIB2_RFC_QD1_6MHz_H_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V21: V1:SIB2_RFC_QD1_6MHz_H_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V22: V1:SIB2_RFC_QD1_6MHz_SUM_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V23: V1:SIB2_RFC_QD1_6MHz_SUM_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V24: V1:SIB2_RFC_QD1_6MHz_V_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V25: V1:SIB2_RFC_QD1_6MHz_V_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V26: V1:SIB2_RFC_QD1_8MHz_H_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V27: V1:SIB2_RFC_QD1_8MHz_H_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V28: V1:SIB2_RFC_QD1_8MHz_SUM_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V29: V1:SIB2_RFC_QD1_8MHz_SUM_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V30: V1:SIB2_RFC_QD1_8MHz_V_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V31: V1:SIB2_RFC_QD1_8MHz_V_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V32: V1:SIB2_RFC_QD1_GALVO_H_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V33: V1:SIB2_RFC_QD1_GALVO_V_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V34: V1:SIB2_RFC_QD1_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V35: V1:SIB2_RFC_QD1_Sum_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V36: V1:SIB2_RFC_QD1_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V37: V1:SIB2_RFC_QD2_12MHz_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V38: V1:SIB2_RFC_QD2_12MHz_Sum_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V39: V1:SIB2_RFC_QD2_12MHz_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V40: V1:SIB2_RFC_QD2_16MHz_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V41: V1:SIB2_RFC_QD2_16MHz_Sum_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V42: V1:SIB2_RFC_QD2_16MHz_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V43: V1:SIB2_RFC_QD2_6MHz_H_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V44: V1:SIB2_RFC_QD2_6MHz_H_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V45: V1:SIB2_RFC_QD2_6MHz_SUM_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V46: V1:SIB2_RFC_QD2_6MHz_SUM_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V47: V1:SIB2_RFC_QD2_6MHz_V_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V48: V1:SIB2_RFC_QD2_6MHz_V_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V49: V1:SIB2_RFC_QD2_8MHz_H_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V50: V1:SIB2_RFC_QD2_8MHz_H_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V51: V1:SIB2_RFC_QD2_8MHz_SUM_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V52: V1:SIB2_RFC_QD2_8MHz_SUM_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V53: V1:SIB2_RFC_QD2_8MHz_V_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V54: V1:SIB2_RFC_QD2_8MHz_V_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V55: V1:SIB2_RFC_QD2_GALVO_H_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V56: V1:SIB2_RFC_QD2_GALVO_V_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V57: V1:SIB2_RFC_QD2_Sum_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V58: V1:SIB2_RFC_QD2_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V59: V1:SIB2_SBE_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V60: V1:SIB2_SBE_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V61: V1:SIB2_Tpro_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V62: V1:SIB2_Tpro_processed_packets_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V63: V1:SNEB_B7_56MHz_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V64: V1:SNEB_B7_6MHz_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V65: V1:SNEB_B7_PD1_12MHz_mag_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V66: V1:SNEB_B7_PD1_12MHz_phi_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V67: V1:SNEB_B7_PD1_6MHz_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V68: V1:SNEB_B7_PD1_IBias_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V69: V1:SNEB_B7_PD1_VBias_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V70: V1:SNEB_B7_PD2_12MHz_mag_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V71: V1:SNEB_B7_PD2_12MHz_phi_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V72: V1:SNEB_B7_PD2_6MHz_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V73: V1:SNEB_B7_PD2_6MHz_Q_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V74: V1:SNEB_B7_PD2_Audio_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V75: V1:SNEB_B7_PD2_Blended_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V76: V1:SNEB_B7_PD2_Blended_D_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V77: V1:SNEB_B7_PD2_DC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V78: V1:SNEB_B7_PD2_IBias_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V79: V1:SNEB_B7_PD2_VBias_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V80: V1:SNEB_Clock_10MHz_mag_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V81: V1:SNEB_Clock_10MHz_phi_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V82: V1:SNEB_LC_B7_QD_TX_err_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V83: V1:SNEB_LC_B7_QD_TY_err_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V84: V1:SNEB_LC_COIL_BL_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V85: V1:SNEB_LC_COIL_BL_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V86: V1:SNEB_LC_COIL_BR_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V87: V1:SNEB_LC_COIL_BR_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V88: V1:SNEB_LC_COIL_FL_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V89: V1:SNEB_LC_COIL_FL_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V90: V1:SNEB_LC_COIL_FR_H_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V91: V1:SNEB_LC_COIL_FR_V_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V92: V1:SNEB_LC_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V93: V1:SNEB_LC_LVDT_BL_H_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V94: V1:SNEB_LC_LVDT_BL_V_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V95: V1:SNEB_LC_LVDT_BR_H_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V96: V1:SNEB_LC_LVDT_BR_V_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V97: V1:SNEB_LC_LVDT_FL_H_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V98: V1:SNEB_LC_LVDT_FL_V_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V99: V1:SNEB_LC_LVDT_FR_H_out_raw_1000Hz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr