VetoPerf analysis over V1:Hrec_hoft_16384Hz


Summary

VetoPerf version:3.2.0: documentation gitlab repository
VetoPerf run by:unknown
VetoPerf processing time:3 h, 18 min, 59 s
Processing Date:Fri Feb 21 15:20:40 2025 (UTC)
Requested start:1407499998 → Mon Aug 12 12:13:00 2024 (UTC)
Requested stop:1408708852 → Mon Aug 26 12:00:34 2024 (UTC)
Requested livetime:950014 sec → 10.996 days
Requested segments:vp.insegments.txt
Summary text file:vp.summary.txt

Triggers (V1:Hrec_hoft_16384Hz - OMICRON)

Number of raw triggers:14767220
Number of raw clusters:109188
Number of active clusters:94622 (SNR > 5.000) 1103 (SNR > 8.000) 909 (SNR > 10.000) 734 (SNR > 20.000)

Vetoes

Number of vetoes:100
Dead time: Integrated time when the veto is active. We note d the fraction of the total livetime (950014 s) when the veto is active.
Efficiency (ε):This is the fraction of V1:Hrec_hoft_16384Hz triggers which are vetoed.
ε/d:This factor is larger than 1 when the veto rejects more triggers than a random veto.
V1:Hrec_hoft_16384Hz: 94622 clusters
V0 → V1:LSC_DARM_0, vetoed clusters: 4215 (4.455 %)
V1 → V1:LSC_DARM_ERR_0, vetoed clusters: 4059 (4.290 %)
V2 → V1:LSC_B1_DC_0, vetoed clusters: 4009 (4.237 %)
V3 → V1:LSC_B1_DC_IN1_0, vetoed clusters: 3967 (4.192 %)
V4 → V1:LSC_DARM_INPUT_0, vetoed clusters: 3691 (3.901 %)
V5 → V1:LSC_B1_DC_IN2_0, vetoed clusters: 3531 (3.732 %)
V6 → V1:LSC_B1_DC_INPUT_0, vetoed clusters: 3531 (3.732 %)
V7 → V1:LSC_DARM_CORR_raw_0, vetoed clusters: 3309 (3.497 %)
V8 → V1:LSC_DCP_DARM_CORR_FLT_LF_0, vetoed clusters: 3099 (3.275 %)
V9 → V1:LSC_DCP_DARM_CORR_FLT_HF_0, vetoed clusters: 1469 (1.552 %)

V0: V1:LSC_DARM_0 (ε = 4.455%, ε/d = 666.185) [click here to expand/hide] [link to here]


V1: V1:LSC_DARM_ERR_0 (ε = 4.290%, ε/d = 673.630) [click here to expand/hide] [link to here]


V2: V1:LSC_B1_DC_0 (ε = 4.237%, ε/d = 671.784) [click here to expand/hide] [link to here]


V3: V1:LSC_B1_DC_IN1_0 (ε = 4.192%, ε/d = 678.093) [click here to expand/hide] [link to here]


V4: V1:LSC_DARM_INPUT_0 (ε = 3.901%, ε/d = 670.011) [click here to expand/hide] [link to here]


V5: V1:LSC_B1_DC_IN2_0 (ε = 3.732%, ε/d = 676.943) [click here to expand/hide] [link to here]


V6: V1:LSC_B1_DC_INPUT_0 (ε = 3.732%, ε/d = 676.943) [click here to expand/hide] [link to here]


V7: V1:LSC_DARM_CORR_raw_0 (ε = 3.497%, ε/d = 706.442) [click here to expand/hide] [link to here]


V8: V1:LSC_DCP_DARM_CORR_FLT_LF_0 (ε = 3.275%, ε/d = 711.778) [click here to expand/hide] [link to here]


V9: V1:LSC_DCP_DARM_CORR_FLT_HF_0 (ε = 1.552%, ε/d = 1048.882) [click here to expand/hide] [link to here]


V10: V1:LSC_DARM_CORR_0 (ε = 1.209%, ε/d = 1093.387) [click here to expand/hide] [link to here]


V11: V1:INJ_SSFS_err_0 (ε = 0.308%, ε/d = 64.790) [click here to expand/hide] [link to here]


V12: V1:INJ_RFC_TRA_DC_0 (ε = 0.291%, ε/d = 96.647) [click here to expand/hide] [link to here]


V13: V1:INJ_RFC_TRA_0 (ε = 0.290%, ε/d = 92.973) [click here to expand/hide] [link to here]


V14: V1:LSC_BS_CORR_0 (ε = 0.018%, ε/d = 329.334) [click here to expand/hide] [link to here]


V15: V1:LSC_CARM_MC_ERR_0 (ε = 0.002%, ε/d = 654.354) [click here to expand/hide] [link to here]


V16: V1:LSC_CARM_MC_INPUT_0 (ε = 0.002%, ε/d = 649.587) [click here to expand/hide] [link to here]


V17: V1:INJ_PStabCorr_tempHP_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V18: V1:INJ_PStabCorr_tempOffset_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V19: V1:INJ_PStabErr_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V20: V1:INJ_SFP_B4_RAMP_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V21: V1:INJ_SIB1_QD1_H_NORM_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V22: V1:INJ_SIB1_QD1_V_NORM_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V23: V1:INJ_SIB1_QD2_H_NORM_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V24: V1:INJ_SIB1_QD2_V_NORM_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V25: V1:INJ_SIB2_RFC_6MHz_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V26: V1:INJ_SL_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V27: V1:INJ_SSFS_BOOST_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V28: V1:INJ_SSFS_BOOST_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V29: V1:INJ_SSFS_LOCK_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V30: V1:INJ_Tpro_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V31: V1:INJ_Tpro_processed_packets_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V32: V1:ISC_LASER_AUX_test_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V33: V1:ISC_Tpro_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V34: V1:ISC_Tpro_processed_packets_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V35: V1:ISYS_Acl_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V36: V1:ISYS_Acl_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V37: V1:ISYS_EER_FastDac_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V38: V1:ISYS_EER_FastDac_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V39: V1:ISYS_EER_dac_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V40: V1:ISYS_EER_dac_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V41: V1:ISYS_moni_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V42: V1:ISYS_moni_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V43: V1:ISYS_slow_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V44: V1:ISYS_slow_pre_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V45: V1:ISYS_slow_pre_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V46: V1:ISYSnoise_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V47: V1:ISYSnoise_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V48: V1:LFC_AOM_LOOP_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V49: V1:LFC_AOM_LOOP_CORR_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V50: V1:LFC_AOM_LOOP_DC1_sw_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V51: V1:LFC_AOM_LOOP_DC2_sw_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V52: V1:LFC_AOM_LOOP_ENBL_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V53: V1:LFC_AOM_LOOP_GAIN_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V54: V1:LFC_AOM_LOOP_INPUT_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V55: V1:LFC_AOM_LOOP_POST_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V56: V1:LFC_AOM_LOOP_PRE_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V57: V1:LFC_AOM_LOOP_SET_1kHz_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V58: V1:LFC_Ctrl_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V59: V1:LFC_Ctrl_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V60: V1:LFC_GR_PD_RF_5MHz_I_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V61: V1:LFC_GR_PD_RF_5MHz_I_CAL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V62: V1:LFC_GR_PD_RF_5MHz_I_FIL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V63: V1:LFC_GR_PD_RF_5MHz_I_NORM_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V64: V1:LFC_LOCK_FLAG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V65: V1:LFC_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V66: V1:LFC_SC_PD_DC_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V67: V1:LFC_SC_PD_RF_11MHz_I_CAL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V68: V1:LFC_SC_PD_RF_11MHz_I_FIL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V69: V1:LFC_Z_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V70: V1:LFC_Z_CORR_ENB_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V71: V1:LFC_Z_GR_ERR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V72: V1:LFC_Z_PRE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V73: V1:LFC_Z_SC_ERR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V74: V1:LNFS_Demod_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V75: V1:LNFS_Demod_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V76: V1:LNFS_RAMS_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V77: V1:LNFS_RAMS_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V78: V1:LSC_ARMS_LOCK_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V79: V1:LSC_Acl_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V80: V1:LSC_Acl_Moni_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V81: V1:LSC_Acl_Moni_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V82: V1:LSC_Acl_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V83: V1:LSC_BS_LOCK_FLAG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V84: V1:LSC_CARM_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V85: V1:LSC_CARM_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V86: V1:LSC_CARM_DARM_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V87: V1:LSC_CARM_DARM_ON_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V88: V1:LSC_CARM_DARM_flt_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V89: V1:LSC_CARM_ERR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V90: V1:LSC_CARM_FAST_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V91: V1:LSC_CARM_INPUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V92: V1:LSC_CARM_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V93: V1:LSC_CARM_SLOW_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V94: V1:LSC_CARM_SLOW_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V95: V1:LSC_CARM_SLOW_ERR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V96: V1:LSC_CARM_SLOW_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V97: V1:LSC_CARM_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V98: V1:LSC_DARM_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V99: V1:LSC_DARM_TRIG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr