VetoPerf analysis over V1:Hrec_hoft_16384Hz


Summary

VetoPerf version:3.2.0: documentation gitlab repository
VetoPerf run by:unknown
VetoPerf processing time:3 h, 34 min, 1 s
Processing Date:Fri Jan 19 15:37:09 2024 (UTC)
Requested start:1387467885 → Sun Dec 24 15:44:27 2023 (UTC)
Requested stop:1388080814 → Sun Dec 31 17:59:56 2023 (UTC)
Requested livetime:452627 sec → 5.239 days
Requested segments:vp.insegments.txt
Summary text file:vp.summary.txt

Triggers (V1:Hrec_hoft_16384Hz - OMICRON)

Number of raw triggers:4316241
Number of raw clusters:71452
Number of active clusters:71452 (SNR > 5.000) 592 (SNR > 8.000) 470 (SNR > 10.000) 402 (SNR > 20.000)

Vetoes

Number of vetoes:100
Dead time: Integrated time when the veto is active. We note d the fraction of the total livetime (452627 s) when the veto is active.
Efficiency (ε):This is the fraction of V1:Hrec_hoft_16384Hz triggers which are vetoed.
ε/d:This factor is larger than 1 when the veto rejects more triggers than a random veto.
V1:Hrec_hoft_16384Hz: 71452 clusters
V0 → V1:Sc_WI_FF50HZ_GAIN_0, vetoed clusters: 419 (0.586 %)
V1 → V1:Sc_WI_FF50HZ_P_ERR_0, vetoed clusters: 349 (0.488 %)
V2 → V1:Sc_WI_MAR_Z_CORR_0, vetoed clusters: 342 (0.479 %)
V3 → V1:Sc_WI_FF50HZ_PHASE_0, vetoed clusters: 340 (0.476 %)
V4 → V1:Sc_WI_MAR_Y_CORR_0, vetoed clusters: 338 (0.473 %)
V5 → V1:Sc_WI_MIR_X_AA_0, vetoed clusters: 228 (0.319 %)
V6 → V1:Sc_WI_MIR_VOUT_UR_0, vetoed clusters: 111 (0.155 %)
V7 → V1:Sc_WI_MIR_Y_AA_0, vetoed clusters: 60 (0.084 %)
V8 → V1:Sc_WI_FF50HZ_G_ERR_0, vetoed clusters: 39 (0.055 %)
V9 → V1:Sc_WI_MIR_VOUT_DL_0, vetoed clusters: 12 (0.017 %)

V0: V1:Sc_WI_FF50HZ_GAIN_0 (ε = 0.586%, ε/d = 524.288) [click here to expand/hide] [link to here]


V1: V1:Sc_WI_FF50HZ_P_ERR_0 (ε = 0.488%, ε/d = 845.987) [click here to expand/hide] [link to here]


V2: V1:Sc_WI_MAR_Z_CORR_0 (ε = 0.479%, ε/d = 2151.303) [click here to expand/hide] [link to here]


V3: V1:Sc_WI_FF50HZ_PHASE_0 (ε = 0.476%, ε/d = 889.180) [click here to expand/hide] [link to here]


V4: V1:Sc_WI_MAR_Y_CORR_0 (ε = 0.473%, ε/d = 2127.476) [click here to expand/hide] [link to here]


V5: V1:Sc_WI_MIR_X_AA_0 (ε = 0.319%, ε/d = 2749.706) [click here to expand/hide] [link to here]


V6: V1:Sc_WI_MIR_VOUT_UR_0 (ε = 0.155%, ε/d = 1472.328) [click here to expand/hide] [link to here]


V7: V1:Sc_WI_MIR_Y_AA_0 (ε = 0.084%, ε/d = 2400.574) [click here to expand/hide] [link to here]


V8: V1:Sc_WI_FF50HZ_G_ERR_0 (ε = 0.055%, ε/d = 807.667) [click here to expand/hide] [link to here]


V9: V1:Sc_WI_MIR_VOUT_DL_0 (ε = 0.017%, ε/d = 1575.082) [click here to expand/hide] [link to here]


V10: V1:Sc_WI_F7_TZ_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V11: V1:Sc_WI_F7_X_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V12: V1:Sc_WI_F7_Y_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V13: V1:Sc_WI_F7_Z_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V14: V1:Sc_WI_LOCK_FLAG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V15: V1:Sc_WI_MAR_COIL_FLAG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V16: V1:Sc_WI_MAR_PSDM_PWR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V17: V1:Sc_WI_MAR_PSDM_X1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V18: V1:Sc_WI_MAR_PSDM_X2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V19: V1:Sc_WI_MAR_PSDM_Y1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V20: V1:Sc_WI_MAR_PSDM_Y2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V21: V1:Sc_WI_MAR_PSDT_PWR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V22: V1:Sc_WI_MAR_PSDT_X1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V23: V1:Sc_WI_MAR_PSDT_Y1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V24: V1:Sc_WI_MAR_PSDT_Y2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V25: V1:Sc_WI_MAR_TX_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V26: V1:Sc_WI_MAR_TX_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V27: V1:Sc_WI_MAR_TY_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V28: V1:Sc_WI_MAR_TY_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V29: V1:Sc_WI_MAR_TY_T_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V30: V1:Sc_WI_MAR_TZ_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V31: V1:Sc_WI_MAR_TZ_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V32: V1:Sc_WI_MIR_COIL_FLAG_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V33: V1:Sc_WI_MIR_PSDF_PWR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V34: V1:Sc_WI_MIR_PSDF_X1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V35: V1:Sc_WI_MIR_PSDF_X2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V36: V1:Sc_WI_MIR_PSDF_Y1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V37: V1:Sc_WI_MIR_PSDF_Y2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V38: V1:Sc_WI_MIR_PSDI_PWR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V39: V1:Sc_WI_MIR_PSDI_X1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V40: V1:Sc_WI_MIR_PSDI_X2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V41: V1:Sc_WI_MIR_PSDI_Y1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V42: V1:Sc_WI_MIR_TX_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V43: V1:Sc_WI_MIR_TY_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V44: V1:Sc_WI_MIR_VOUT_DR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V45: V1:Sc_WI_MIR_VOUT_UL_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V46: V1:Sc_WI_MIR_Z_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V47: V1:Sc_WI_MIR_Z_CORR_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V48: V1:Sc_WI_noise_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V49: V1:TCS_ADC0_test0_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V50: V1:TCS_CEB_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V51: V1:TCS_CEB_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V52: V1:TCS_CHROCC_PR_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V53: V1:TCS_CHROCC_SR_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V54: V1:TCS_HWS_NE_TE1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V55: V1:TCS_HWS_NE_TE2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V56: V1:TCS_HWS_NE_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V57: V1:TCS_HWS_NI_TE1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V58: V1:TCS_HWS_NI_TE2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V59: V1:TCS_HWS_NI_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V60: V1:TCS_HWS_WE_TE1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V61: V1:TCS_HWS_WE_TE2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V62: V1:TCS_HWS_WE_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V63: V1:TCS_HWS_WI_TE1_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V64: V1:TCS_HWS_WI_TE2_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V65: V1:TCS_HWS_WI_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V66: V1:TCS_NI_CO2_CH_PWRLAS_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V67: V1:TCS_NI_CO2_ISSIN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V68: V1:TCS_NI_CO2_ISSOUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V69: V1:TCS_NI_CO2_POWER_CH_PICKOFF_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V70: V1:TCS_NI_CO2_POWER_CH_PSTAB_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V71: V1:TCS_NI_CO2_PWRIN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V72: V1:TCS_NI_CO2_PWRLAS_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V73: V1:TCS_NI_CO2_PWROUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V74: V1:TCS_NI_DAS_POWER_IN_CALI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V75: V1:TCS_NI_DAS_POWER_OUT_CALI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V76: V1:TCS_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V77: V1:TCS_N_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V78: V1:TCS_WI_CO2_CH_PWRLAS_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V79: V1:TCS_WI_CO2_ISSIN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V80: V1:TCS_WI_CO2_ISSOUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V81: V1:TCS_WI_CO2_POWER_CH_PICKOFF_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V82: V1:TCS_WI_CO2_POWER_CH_PSTAB_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V83: V1:TCS_WI_CO2_PWRIN_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V84: V1:TCS_WI_CO2_PWRLAS_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V85: V1:TCS_WI_CO2_PWROUT_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V86: V1:TCS_WI_DAS_POWER_IN_CALI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V87: V1:TCS_WI_DAS_POWER_OUT_CALI_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V88: V1:TCS_W_NOISE_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V89: V1:TIMING_moni_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V90: V1:TIMING_moni_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V91: V1:TproImgFDS_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V92: V1:TproImgFDS_processed_packets_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V93: V1:WEB_ALS_BPC_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V94: V1:WEB_ALS_BPC_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V95: V1:WEB_ALS_Tpro_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V96: V1:WEB_ALS_Tpro_processed_packets_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V97: V1:WEB_ALS_fast_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V98: V1:WEB_ALS_fast_elapsed_time_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


V99: V1:WEB_ALS_readout_CfgChange_0 (ε = 0.000%, ε/d = 0.000) [click here to expand/hide] [link to here]


Florent Robinet, florent.robinet@ijclab.in2p3.fr