OUTPUT DIRECTORY ./report OUTPUT VERBOSITY 1 TARGET OMICRON V1:Hrec_hoft_16384Hz TARGET CLUSTERDT 0.1 TARGET SNRMIN 7 COINC TIMEWIN 1.0 VETO UPMIN 0.4 VETO UMIN 10 VETO PRINT 0 VETO PERF 5 8 10 20 VETO PERFPRINT 1 0 SOURCE CLUSTERDT 0.1 SOURCE OMICRON V1:LSC_NArm SOURCE OMICRON V1:LSC_NArm_CORR SOURCE OMICRON V1:LSC_NArm_ERR SOURCE OMICRON V1:LSC_NArm_INPUT SOURCE OMICRON V1:LSC_NArm_LOCK_ON SOURCE OMICRON V1:LSC_NArm_NOISE SOURCE OMICRON V1:LSC_NArm_TRIG SOURCE OMICRON V1:LSC_NE_CORR SOURCE OMICRON V1:LSC_NE_LOCK_FLAG SOURCE OMICRON V1:LSC_NE_VIOLIN1_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN2_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN3_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN4_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN5_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN6_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN7_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN8_ERR SOURCE OMICRON V1:LSC_NE_VIOLIN_CORR SOURCE OMICRON V1:LSC_NI_CORR SOURCE OMICRON V1:LSC_NI_HB_moni SOURCE OMICRON V1:LSC_NI_LOCK_FLAG SOURCE OMICRON V1:LSC_NI_VIOLIN1_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN2_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN3_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN4_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN5_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN6_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN7_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN8_ERR SOURCE OMICRON V1:LSC_NI_VIOLIN_CORR SOURCE OMICRON V1:LSC_NOISE SOURCE OMICRON V1:LSC_PRCL SOURCE OMICRON V1:LSC_PRCL_CORR SOURCE OMICRON V1:LSC_PRCL_CORR_raw SOURCE OMICRON V1:LSC_PRCL_DARM_CORR SOURCE OMICRON V1:LSC_PRCL_DARM_flt SOURCE OMICRON V1:LSC_PRCL_ERR SOURCE OMICRON V1:LSC_PRCL_INPUT SOURCE OMICRON V1:LSC_PRCL_NOISE SOURCE OMICRON V1:LSC_PRCL_TRIG SOURCE OMICRON V1:LSC_PRCL_TRIGGER_IN SOURCE OMICRON V1:LSC_PRCL_TRIGGER_INPUT SOURCE OMICRON V1:LSC_PR_CORR SOURCE OMICRON V1:LSC_PR_LOCK_FLAG SOURCE OMICRON V1:LSC_SRCL SOURCE OMICRON V1:LSC_SRCL_CORR SOURCE OMICRON V1:LSC_SRCL_DARM_CORR SOURCE OMICRON V1:LSC_SRCL_DARM_flt SOURCE OMICRON V1:LSC_SRCL_ERR SOURCE OMICRON V1:LSC_SRCL_INPUT SOURCE OMICRON V1:LSC_SRCL_NOISE SOURCE OMICRON V1:LSC_SRCL_SET_CORR_CLIP SOURCE OMICRON V1:LSC_SRCL_SET_CORR_FLT SOURCE OMICRON V1:LSC_SRCL_SET_ENBL SOURCE OMICRON V1:LSC_SRCL_SET_EN_TRIG SOURCE OMICRON V1:LSC_SRCL_SET_TRIG SOURCE OMICRON V1:LSC_SRCL_TRIG SOURCE OMICRON V1:LSC_SRCL_TRIGGER_IN SOURCE OMICRON V1:LSC_SRCL_TRIGGER_INPUT SOURCE OMICRON V1:LSC_SR_CORR SOURCE OMICRON V1:LSC_SR_LOCK_FLAG SOURCE OMICRON V1:LSC_SSFS_ERR_Q_B4NORM_112 SOURCE OMICRON V1:LSC_SSFS_ERR_Q_B4NORM_12 SOURCE OMICRON V1:LSC_SUSP_CfgChange SOURCE OMICRON V1:LSC_SUSP_elapsed_time SOURCE OMICRON V1:LSC_SWITCH_MC_ON SOURCE OMICRON V1:LSC_SWITCH_SSFS_ON SOURCE OMICRON V1:LSC_WArm SOURCE OMICRON V1:LSC_WArm_CORR SOURCE OMICRON V1:LSC_WArm_ERR SOURCE OMICRON V1:LSC_WArm_INPUT SOURCE OMICRON V1:LSC_WArm_LOCK_ON SOURCE OMICRON V1:LSC_WArm_NOISE SOURCE OMICRON V1:LSC_WArm_TRIG SOURCE OMICRON V1:LSC_WE_CORR SOURCE OMICRON V1:LSC_WE_LOCK_FLAG SOURCE OMICRON V1:LSC_WE_VIOLIN1_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN2_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN3_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN4_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN5_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN6_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN7_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN8_ERR SOURCE OMICRON V1:LSC_WE_VIOLIN_CORR SOURCE OMICRON V1:LSC_WI_CORR SOURCE OMICRON V1:LSC_WI_HB_moni SOURCE OMICRON V1:LSC_WI_LOCK_FLAG SOURCE OMICRON V1:LSC_WI_VIOLIN1_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN2_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN3_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN4_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN5_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN6_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN7_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN8_ERR SOURCE OMICRON V1:LSC_WI_VIOLIN_CORR SOURCE OMICRON V1:NCal_NEF_box_T_Volts SOURCE OMICRON V1:NCal_NEF_microphone SOURCE OMICRON V1:NCal_NEF_motor_T_Volts