OUTPUT DIRECTORY ./report OUTPUT VERBOSITY 1 TARGET OMICRON V1:Hrec_hoft_16384Hz TARGET CLUSTERDT 0.1 TARGET SNRMIN 7 COINC TIMEWIN 1.0 VETO UPMIN 0.4 VETO UMIN 10 VETO PRINT 0 VETO PERF 5 8 10 20 VETO PERFPRINT 1 0 SOURCE CLUSTERDT 0.1 SOURCE OMICRON V1:ISC_Tpro_processed_packets SOURCE OMICRON V1:ISYS_Acl_CfgChange SOURCE OMICRON V1:ISYS_Acl_elapsed_time SOURCE OMICRON V1:ISYS_EER_FastDac_CfgChange SOURCE OMICRON V1:ISYS_EER_FastDac_elapsed_time SOURCE OMICRON V1:ISYS_EER_dac_CfgChange SOURCE OMICRON V1:ISYS_EER_dac_elapsed_time SOURCE OMICRON V1:ISYS_moni_CfgChange SOURCE OMICRON V1:ISYS_moni_elapsed_time SOURCE OMICRON V1:ISYS_slow_elapsed_time SOURCE OMICRON V1:ISYS_slow_pre_CfgChange SOURCE OMICRON V1:ISYS_slow_pre_elapsed_time SOURCE OMICRON V1:ISYSnoise_CfgChange SOURCE OMICRON V1:ISYSnoise_elapsed_time SOURCE OMICRON V1:LFC_AOM_LOOP_CORR SOURCE OMICRON V1:LFC_AOM_LOOP_DC1_sw SOURCE OMICRON V1:LFC_AOM_LOOP_DC2_sw SOURCE OMICRON V1:LFC_AOM_LOOP_ENBL SOURCE OMICRON V1:LFC_AOM_LOOP_GAIN SOURCE OMICRON V1:LFC_AOM_LOOP_INPUT SOURCE OMICRON V1:LFC_AOM_LOOP_POST SOURCE OMICRON V1:LFC_AOM_LOOP_PRE SOURCE OMICRON V1:LFC_AOM_LOOP_SET SOURCE OMICRON V1:LFC_Ctrl_CfgChange SOURCE OMICRON V1:LFC_Ctrl_elapsed_time SOURCE OMICRON V1:LFC_GR_PD_DC_NORM SOURCE OMICRON V1:LFC_GR_PD_RF_5MHz_I SOURCE OMICRON V1:LFC_GR_PD_RF_5MHz_I_CAL SOURCE OMICRON V1:LFC_GR_PD_RF_5MHz_I_FIL SOURCE OMICRON V1:LFC_GR_PD_RF_5MHz_I_NORM SOURCE OMICRON V1:LFC_LOCK_FLAG SOURCE OMICRON V1:LFC_NOISE SOURCE OMICRON V1:LFC_SC_PD_DC SOURCE OMICRON V1:LFC_SC_PD_DC_CND SOURCE OMICRON V1:LFC_SC_PD_DC_lowpass SOURCE OMICRON V1:LFC_SC_PD_RF_11MHz_I SOURCE OMICRON V1:LFC_SC_PD_RF_11MHz_I_CAL SOURCE OMICRON V1:LFC_SC_PD_RF_11MHz_I_FIL SOURCE OMICRON V1:LFC_SC_PD_RF_11MHz_I_NONFIL_NORM SOURCE OMICRON V1:LFC_SC_PD_RF_11MHz_I_NORM SOURCE OMICRON V1:LFC_Z_CORR SOURCE OMICRON V1:LFC_Z_CORR_ENB SOURCE OMICRON V1:LFC_Z_GR_ERR SOURCE OMICRON V1:LFC_Z_INPUT SOURCE OMICRON V1:LFC_Z_POST SOURCE OMICRON V1:LFC_Z_PRE SOURCE OMICRON V1:LFC_Z_SC_ERR SOURCE OMICRON V1:LNFS_Demod_CfgChange SOURCE OMICRON V1:LNFS_Demod_elapsed_time SOURCE OMICRON V1:LNFS_RAMS_CfgChange SOURCE OMICRON V1:LNFS_RAMS_elapsed_time SOURCE OMICRON V1:LSC_ALS_ARMS_ON SOURCE OMICRON V1:LSC_ALS_CARM_REFL SOURCE OMICRON V1:LSC_ALS_DARM_REFL SOURCE OMICRON V1:LSC_ALS_NArm SOURCE OMICRON V1:LSC_ALS_NArm_CORR SOURCE OMICRON V1:LSC_ALS_NArm_ERR SOURCE OMICRON V1:LSC_ALS_NArm_NOISE SOURCE OMICRON V1:LSC_ALS_NArm_RAW SOURCE OMICRON V1:LSC_ALS_NArm_REL SOURCE OMICRON V1:LSC_ALS_NArm_TRIG SOURCE OMICRON V1:LSC_ALS_WArm SOURCE OMICRON V1:LSC_ALS_WArm_CORR SOURCE OMICRON V1:LSC_ALS_WArm_ERR SOURCE OMICRON V1:LSC_ALS_WArm_NOISE SOURCE OMICRON V1:LSC_ALS_WArm_RAW SOURCE OMICRON V1:LSC_ALS_WArm_REL SOURCE OMICRON V1:LSC_ALS_WArm_TRIG SOURCE OMICRON V1:LSC_ARMS_LOCK_ON SOURCE OMICRON V1:LSC_Acl_CfgChange SOURCE OMICRON V1:LSC_Acl_Moni_CfgChange SOURCE OMICRON V1:LSC_Acl_Moni_elapsed_time SOURCE OMICRON V1:LSC_Acl_elapsed_time SOURCE OMICRON V1:LSC_B1B4_DIF SOURCE OMICRON V1:LSC_B1B4_SUM SOURCE OMICRON V1:LSC_B1_DC_IN1 SOURCE OMICRON V1:LSC_B1_DC_IN2 SOURCE OMICRON V1:LSC_B1_DC_INPUT SOURCE OMICRON V1:LSC_B1p_56MHz_I_ARM_NORM SOURCE OMICRON V1:LSC_B1p_DC_TRIG SOURCE OMICRON V1:LSC_B1p_DC_TRIG_p SOURCE OMICRON V1:LSC_B1p_MICH_NORM SOURCE OMICRON V1:LSC_B1p_SUM_NORM SOURCE OMICRON V1:LSC_B2_112MHz_MAG SOURCE OMICRON V1:LSC_B2_112MHz_MAG_NORM SOURCE OMICRON V1:LSC_B2_112MHz_MAG_TRIG SOURCE OMICRON V1:LSC_B2_12MHz_MAG SOURCE OMICRON V1:LSC_B2_12MHz_MAG_NORM SOURCE OMICRON V1:LSC_B2_12MHz_MAG_TRIG SOURCE OMICRON V1:LSC_B2_6MHz_I_ARM SOURCE OMICRON V1:LSC_B2_6MHz_I_ARM_NORM SOURCE OMICRON V1:LSC_B2_6MHz_I_COMP SOURCE OMICRON V1:LSC_B2_DC_OLD_NORM SOURCE OMICRON V1:LSC_B2_DC_TRIG SOURCE OMICRON V1:LSC_B4_112MHz_LP SOURCE OMICRON V1:LSC_B4_112MHz_MAG SOURCE OMICRON V1:LSC_B4_112MHz_MAG_GRAD SOURCE OMICRON V1:LSC_B4_112MHz_MAG_GRAD_TRIG SOURCE OMICRON V1:LSC_B4_112MHz_MAG_NORM SOURCE OMICRON V1:LSC_B4_112MHz_MAG_TRIG