OUTPUT  DIRECTORY  ./report
OUTPUT  VERBOSITY  1

TARGET  OMICRON    V1:Hrec_hoft_16384Hz
TARGET  CLUSTERDT  0.1
TARGET  SNRMIN     7

COINC   TIMEWIN    1.0

VETO    UPMIN      0.4
VETO    UMIN       10
VETO    PRINT      0
VETO    PERF       5  8  10  20
VETO    PERFPRINT  1  0

SOURCE  CLUSTERDT  0.1
SOURCE  OMICRON    V1:AFC_Ctrl_CfgChange
SOURCE  OMICRON    V1:AFC_Ctrl_elapsed_time
SOURCE  OMICRON    V1:AFC_DRIFT_CTRL_ENBL
SOURCE  OMICRON    V1:AFC_DRIFT_CTRL_ENBL_CORR
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TX_CORR
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TX_INPUT
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TX_POST
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TX_demod_I
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TX_demod_Q
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TY_CORR
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TY_INPUT
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TY_POST
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TY_demod_I
SOURCE  OMICRON    V1:AFC_FCEM_DRIFT_TY_demod_Q
SOURCE  OMICRON    V1:AFC_FCEM_SC_TX_demod_I
SOURCE  OMICRON    V1:AFC_FCEM_SC_TX_demod_Q
SOURCE  OMICRON    V1:AFC_FCEM_SC_TY_demod_I
SOURCE  OMICRON    V1:AFC_FCEM_SC_TY_demod_Q
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TX_CORR
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TX_INPUT
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TX_POST
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TX_demod_I
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TX_demod_Q
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TY_CORR
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TY_INPUT
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TY_POST
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TY_demod_I
SOURCE  OMICRON    V1:AFC_FCIM_DRIFT_TY_demod_Q
SOURCE  OMICRON    V1:AFC_FCIM_SC_TX_demod_I
SOURCE  OMICRON    V1:AFC_FCIM_SC_TX_demod_Q
SOURCE  OMICRON    V1:AFC_FCIM_SC_TY_demod_I
SOURCE  OMICRON    V1:AFC_FCIM_SC_TY_demod_Q
SOURCE  OMICRON    V1:AFC_FF_PSD_X_NORM
SOURCE  OMICRON    V1:AFC_FF_PSD_Y_NORM
SOURCE  OMICRON    V1:AFC_FLT_CORR_FCEM_TX
SOURCE  OMICRON    V1:AFC_FLT_CORR_FCEM_TY
SOURCE  OMICRON    V1:AFC_FLT_CORR_FCIM_TX
SOURCE  OMICRON    V1:AFC_FLT_CORR_FCIM_TY
SOURCE  OMICRON    V1:AFC_GREEN_AA_ENBL
SOURCE  OMICRON    V1:AFC_GREEN_AA_ENBL_CORR
SOURCE  OMICRON    V1:AFC_GR_AA_NOISE
SOURCE  OMICRON    V1:AFC_GR_BPC2_ENBL
SOURCE  OMICRON    V1:AFC_GR_BPC2_ENBL_CORR
SOURCE  OMICRON    V1:AFC_GR_BPC_CTRL_ENBL
SOURCE  OMICRON    V1:AFC_GR_BPC_CTRL_ENBL_CORR
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TX
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TX_CORR
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TX_INPUT
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TX_POST
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TX_PRE
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TX_SET
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TY
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TY_CORR
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TY_INPUT
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TY_POST
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TY_PRE
SOURCE  OMICRON    V1:AFC_GR_FCEM_AA_TY_SET
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TX
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TX_CORR
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TX_INPUT
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TX_POST
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TX_PRE
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TX_SET
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TY
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TY_CORR
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TY_INPUT
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TY_POST
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TY_PRE
SOURCE  OMICRON    V1:AFC_GR_FCIM_AA_TY_SET
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_X
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_X_CORR
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_X_INPUT
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_X_POST
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_Y
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_Y_CORR
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_Y_INPUT
SOURCE  OMICRON    V1:AFC_GR_M5_BPC2_Y_POST
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_X_CMD
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_X_CORR
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_X_INPUT
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_X_POST
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_X_demod_I
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_X_demod_Q
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_Y_CMD
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_Y_CORR
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_Y_INPUT
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_Y_POST
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_Y_demod_I
SOURCE  OMICRON    V1:AFC_GR_M5_BPC_Y_demod_Q
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_X
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_X_CORR
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_X_INPUT
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_X_POST
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_Y
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_Y_CORR
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_Y_INPUT
SOURCE  OMICRON    V1:AFC_GR_M7_BPC2_Y_POST
SOURCE  OMICRON    V1:AFC_GR_M7_BPC_X_CMD
SOURCE  OMICRON    V1:AFC_GR_M7_BPC_X_CORR
SOURCE  OMICRON    V1:AFC_GR_M7_BPC_X_INPUT